Numerous epidemic lung diseases such as COVID-19, tuberculosis (TB), and pneumonia have spread over the world, killing millions of people. Medical specialists have experienced challenges in correctly identifying these diseases due to their subtle differences in Chest X-ray images (CXR). To assist the medical experts, this study proposed a computer-aided lung illness identification method based on the CXR images. For the first time, 17 different forms of lung disorders were considered and the study was divided into six trials with each containing two, two, three, four, fourteen, and seventeen different forms of lung disorders. The proposed framework combined robust feature extraction capabilities of a lightweight parallel convolutional neural network (CNN) with the classification abilities of the extreme learning machine algorithm named CNN-ELM. An optimistic accuracy of 90.92% and an area under the curve (AUC) of 96.93% was achieved when 17 classes were classified side by side. It also accurately identified COVID-19 and TB with 99.37% and 99.98% accuracy, respectively, in 0.996 microseconds for a single image. Additionally, the current results also demonstrated that the framework could outperform the existing state-of-the-art (SOTA) models. On top of that, a secondary conclusion drawn from this study was that the prospective framework retained its effectiveness over a range of real-world environments, including balanced-unbalanced or large-small datasets, large multiclass or simple binary class, and high- or low-resolution images. A prototype Android App was also developed to establish the potential of the framework in real-life implementation.

Hardware trojans (HTs) pose a critical security threat to modern integrated circuits (ICs) through malicious activities, including leaking critical information, executing unauthorized commands, and reducing IC lifetime. Traditional functional and structural verification approaches are inefficient in detecting stealthy Trojans effectively due to corner conditions and rare triggers. Furthermore, the existing approaches are limited to specific circuit designs and require formulating new models for other IC designs. In order to overcome such shortcomings, we introduce an IC topology and behavior-aware HT detection approach, where we extract different structural features of the underlying IC along with the behavioral information for HT detection. Structural features include node (gate) types and their respective counts and connectivity information extracted through an automated process using graph learning. These features are complemented with the behavioral information, such as operating frequency and bit-flip patterns under anomalous operating conditions (analogous to vaccination) and analyzed for Trojan detection. We propose a graph neural network (GNN) architecture where we utilize a graph convolution network (GCN) for detecting HTs. The proposed technique does not require the golden IC reference design for HT detection. Our model shows an average of around 93.15% accuracy while tested on an utterly unseen Trojan benchmark during the training phase. This shows that the proposed technique can learn the structural feature distribution of the ICs and their behavioral information to distinguish Trojan-free and Trojan-inserted circuits irrespective of the IC topology used in the training phase.

One of the pivotal security threats for embedded computing systems is malicious softwarea.k.a malware. With efficiency and efficacy, Machine Learning (ML) has been widely adopted for malware detection in recent times. Despite being efficient, the existing techniques require updating the ML model frequently with newer benign and malware samples for training and modeling an efficient malware detector. Furthermore, such constraints limit the detection of emerging malware samples due to the lack of sufficient malware samples required for efficient training. To address such concerns, we introduce a code-aware data generation-based few-shot learning technique. CAD-FSL generates multiple mutated samples of the limitedly seen malware for efficient malware detection. Loss minimization ensures that the generated samples closely mimic the limitedly seen malware, restore malware functionality and mitigate the impractical samples. Such developed synthetic malware is incorporated into the training set to formulate the model that can efficiently detect the emerging malware despite having limited (few-shot) exposure. The experimental results demonstrate that with the proposed "Code-Aware Data Generation" technique, we detect malware with 90% accuracy, which is approximately 9% higher while training classifiers with only limitedly available training data.

Logic obfuscation is introduced as a pivotal defense against multiple hardware threats on integrated circuits (ICs), including reverse engineering (RE) and intellectual property (IP) theft. The effectiveness of logic obfuscation is challenged by recently introduced Boolean satisfiability (SAT) attack and its variants. A plethora of counter measures have also been proposed to thwart the SAT attack. Irrespective of the implemented defense against SAT attacks, large power, performance, and area overheads are seen to be indispensable. In contrast, we propose a cognitive solution, which is a neural network (NN)-based SAT-hard clause translator, SATConda, that incurs a minimal area and power overhead while preserving the original functionality with enhanced security. SATConda is incubated with a SAT-hard clause generator that translates the existing conjunctive normal form (CNF) through minimal perturbations, such as the inclusion of pair of inverters or buffers or adding new lightweight SAT-hard block depending on the provided CNF. For efficient SAT-hard clause generation, SATConda is equipped with a multilayer NN that first learns the dependencies of features (literals and clauses), followed by a long short-term memory (LSTM) network to validate and backpropagate the SAT-hardness for better learning and translation. Our proposed SATConda is evaluated on ISCAS’85 and ISCAS’89 benchmarks and is seen to successfully defend against multiple state-of-the-art SAT attacks devised for hardware RE. In addition, we also evaluate our proposed SATConda’s empirical performance against MiniSAT, Lingeling, and Glucose SAT solvers that form the base for numerous existing deobfuscation SAT attacks.

Logic obfuscation is introduced as a pivotal defense mechanism against emerging hardware threats on Integrated Circuits (ICs) such as reverse engineering (RE) and intellectual property (IP) theft. The effectiveness of logic obfuscation is challenged by recently introduced Boolean satisfiability (SAT) attack and it's variants. A plethora of counter measures have been proposed to thwart the SAT attacks. Irrespective of the implemented defenses, large power, performance and area (PPA) overheads are seen to be indispensable. In contrast, we propose a neural network-based cognitive SAT to SAT-hard clause translator under the constraints of minimal PPA overheads while preserving the original functionality with impenetrable security. Our proposed method is incubated with a SAT-hard clause generator that translates the existing conjunctive normal form (CNF) through minimal perturbations such as inclusion of pair of inverters or buffers or adding new lightweight SAT-hard block depending on the provided CNF. For efficient SAT-hard clause generation, the proposed method is equipped with a multi-layer neural network that first learns the dependencies of features (literals and clauses), followed by a long-short-term-memory (LSTM) network to validate and backpropagate the SAT-hardness for better learning and translation. For a fair comparison with the state-of-the-art, we evaluate our proposed technique on ISCAS'85 benchmarks. It is seen to successfully defend against multiple state-of-the-art SAT attacks devised for hardware RE. In addition, we also evaluate our proposed technique's empirical performance against MiniSAT, Lingeling and Glucose SAT solvers that form the base for numerous existing deobfuscation SAT attacks.

As millions of IoT devices are interconnected together for better communication and computation, compromising even a single device opens a gateway for the adversary to access the network leading to an epidemic. It is pivotal to detect any malicious activity on a device and mitigate the threat. Among multiple feasible security threats, malware (malicious applications) poses a serious risk to modern IoT networks. A wide range of malware can replicate itself and propagate through the network via the underlying connectivity in the IoT networks making the malware epidemic inevitable. There exist several techniques ranging from heuristics to game-theory based technique to model the malware propagation and minimize the impact on the overall network. The state-of-the-art game-theory based approaches solely focus either on the network performance or the malware confinement but does not optimize both simultaneously. In this paper, we propose a throughput-aware game theory-based end-to-end IoT network security framework to confine the malware epidemic while preserving the overall network performance. We propose a two-player game with one player being the attacker and other being the defender. Each player has three different strategies and each strategy leads to a certain gain to that player with an associated cost. A tailored min-max algorithm was introduced to solve the game. We have evaluated our strategy on a 500 node network for different classes of malware and compare with existing state-of-the-art heuristic and game theory-based solutions.

The ever-increasing demand for sophisticated cyber- physical systems (CPS), combined with the fabless model, led to vulnerability exploits in the IC supply chain, especially the insertion of hardware Trojans (HTs). The HTs are malicious modifications made to an authentic design to disrupt the functioning of the integrated circuits (ICs). In this work, we present a survey of the state-of-the-art HT designs focusing on the Trojan design, the risk level in the supply chain, and the targeted platform, followed by a discussion based on our observations. We categorize the HT designs based on the targeted platforms such as ML accelerators, IoT devices, FPGAs, ASICs, memory devices, CPU, and Cryptographic cores.

Hardware Trojans can take various forms to manifest an integrated circuit (IC), causing altered functional behavior, and potential critical consequences, e.g., leaking secret information in encryption applications. This paper presents an approach that uses over-clocking to produce different bit flip patterns between clean design and Trojan-inserted design. Consequently, we apply machine learning algorithms to learn the bit flips distribution at the output of an IC, and therefore differentiate the divergence in the pattern of bit flips caused by the Trojan in IC from its baseline distribution. This approach is effective in detecting Trojan placed off the critical path. The proposed technique is evaluated on benchmarks from Trust-hub and show a detection accuracy of 87%.

The memristor-based memory cell design is getting renewed attention in recent years due to its high speed and low power consumption. This paper aims at designing a novel hybrid memory cell incorporating a minimum number of transistors for a rapid bidirectional write operation. The read stability is one of the key elements for high efficiency and superior performance in memory. The memory cell in this paper was designed undertaking adequate measures for maintaining the stability in successive reads without any refresh operation. Extensive simulation experiments were conducted using 32-nm predictive technology model transistors and the results demonstrate superb performance and sound stability of the proposed memory cell in terms of read/write time as well as switching power consumptions.