The C language, traditionally used in developing safety-critical systems, often faces memory management issues, leading to potential vulnerabilities. Rust emerges as a safer and secure alternative, aiming to mitigate these risks with its robust memory protection features, making it suitable for producing reliable code in critical environments, such as the automotive industry. This study proposes employing Rust code hardened by Control Flow Checking (CFC) in real-time embedded systems, which software is traditionally developed by Assembly and C languages. The methods have been implemented at the application level, i.e., in the Rust source code, to make them platform-agnostic. A methodology for leveraging the Rust advantages is presented, such as stronger security guarantees and modern features, to implement these methods more effectively. Highlighting a use case in the automotive sector, our research demonstrates the Rust capacity to enhance system reliability through CFC, especially against Random Hardware Faults. Two CFC algorithms from the literature, YACCA, and RACFED, have been implemented in the Rust language to assess their effectiveness, obtaining 46.5% Diagnostic Coverage for the YACCA method and 50.1% for RACFED. The proposed approach is aligned with functional safety standards, showcasing how Rust can balance safety requirements and cost considerations in industries reliant on software solutions for critical functionalities.

ShapeFuture will drive innovation in fundamental Electronic Components and Systems (ECS) that are essential for robust, powerful, fail-operational and integrated perception, cognition, AI-enabled decision making, resilient automation and computing, as well as communications, for highly automated vehicles. The overarching vision of ShapeFuture is to bring ECS Innovation to the heart of Europe’s Mobility Transformation, thereby elevating sovereignty by perfecting programmable ECS solutions for intelligent, safe, connected, and highly automated vehicles. In this paper, we detail not only the vision and mission of the ShapeFuture project, but we also showcase the results achieved during the first year.

This paper presents an approach to selectively implementing Software-Based Hardware Fault Tolerance techniques, focusing on control flow error detection. Selecting the most suited Control Flow Checking (CFC) algorithms can be challenging: the literature gives little guidance on the practical implementation in high-level programming languages. Instead, they propose implementations in low-level programming languages, e.g., Assembly. We implemented manually two established CFC algorithms in applications written in C programming language, automatically generated by the Model-Based Software Design approach, as usually done in the automotive industry. The purpose of this paper is to verify their effectiveness in such scenario, thanks to experimental results compliant with the ISO26262 automotive functional safety standard.

Development and verification of Advanced Driver Assistance Systems (ADAS) are challenging activities. Since ADAS have to deal with a huge number of possible operational situations happening in the real world and misbehavior can lead to high-severity hazards, it is imperative to test their behavior thoroughly. However, it is not cost-effective to reproduce all the possible operational situations in controlled environments (e.g., icy road, fog, very snowy steep road, ecc.) for testing ADAS through field test, i.e., through test vehicles, and it is unacceptable to demand the test to end-users. Moreover, discovering safety violations during field tests would lead to huge cost in terms of redesign and increased time-to-market, and it is therefore mandatory to anticipate this phase as early as possible. This can be achieved by means of an effective Hazard Analysis and Risk Assessment (HARA) as prescribed by the ISO26262, when the concept of the item, in our case the ADAS, is developed. Commonly recognized problems of this phase are repeatably and objectivity in terms of independence of its results from the involved engineers. This paper proposes an approach to perform HARA through clever use of vehicle-level simulators to test an initial specification of the ADAS behavior against simulated operational situations, considering also corner cases very difficult or too dangerous to be reproduced during field testing. As a proof-of-concept, the approach is applied to an Advanced Emergency Braking System (AEBS).

This paper presents a methodology to aid the development of multi-agent cyber-physical systems. The software architecture is structured in a multi-layer fashion, distributed on different devices (agents), making its design very challenging. A methodology is thus needed to meet the performance goal of such a system. The proposed methodology relies on Model-Based Software Design techniques, and on the Model/Software/Hardware-In-The-Loop (MIL, SIL, HIL) simulations. In particular, the HIL verification technique, which is widely adopted in the automotive and avionic industry also in the early development phases as a Computer-Aided Design tool, is the core tool of the real-time performances assessment verification. To speed-up the development process, and to obtain a toolchain coherent with the proposed approach, the adoption of a Model-Based Software Design methodology represents an optimal solution. Within those assumptions, we propose a benchmark of the methodology, applied on a customized multiagent system. The aim is to prove that the proposed method is able to achieve and verify a set of real-time requirements on the system behavior.

Modern avionics and space applications are characterized by increasing performance requirements. To satisfy such requirements, the use of commercial-off-the-shelf (COTS) multi-processor system-on-chips (MPSoCs) is a convenient solution. However, such systems are not developed for the avionic use case, therefore a validation approach is in order. In this paper, a validation approach is proposed for fault isolation, detection, and recovery mechanisms applied to mitigate fault effects in mixed-criticality systems. The approach is based on a combination of hardware-in-the-loop testing and fault injection techniques. Experimental results prove that the proposed approach does not interfere with the temporal behavior of the system under-test while allowing a realistic test of the software.

The Failure Mode, Effect and Diagnostic Analysis (FMEDA) is a technique widely adopted by automotive industry to assess the level of reliability of hardware designs. Although very useful, it has the problem of taking a long time to complete and requires experts with extensive knowledge of the circuit under consideration. In this paper, it is presented a comparison between the analysis results obtained from an automatic tool developed by the authors with respect to the ones obtained by hand from a team of experts, followed by a critical review of the strengths and weaknesses, about the rules for automatic classification of the faults effects.

Electronic control units have a central role in almost all the function of road vehicles. Some of these functions are safety critical so, during their development, it is requested by standards, like ISO 26262, to follow strict design rules and to perform in-depth verification steps. One of the technique recommended during the hardware design process is the failure mode, effect and diagnostic analysis (FMEDA). In industrial practice, this technique is manually applied by the designer by inspecting the circuit schematics, but in this way, the process is error-prone and make it difficult to take in proper consideration the contribution of the embedded software. In literature, it is possible to find some attempts to automate the FMEDA process. This article discusses a novel approach that allows reducing the time needed to perform FMEA and improving the quality of the achieved results.