Recently, there has been a pressing need to manage high-dimensional vector data in data science and AI applications. This trend is fueled by the proliferation of unstructured data and machine learning (ML), where ML models usually transform unstructured data into feature vectors for data analytics, e.g., product recommendation. Existing systems and algorithms for managing vector data have two limitations: (1) They incur serious performance issue when handling large-scale and dynamic vector data; and (2) They provide limited functionalities that cannot meet the requirements of versatile applications.

A 128 × 128 cross-correlator for radiometric imaging using interferometric aperture synthesis is presented in this article. It can achieve a landmark performance of 16.384 trillion correlations/s in a single device by calculating cross-correlation between two inputs having 128 channels each, sampled at 1 GHz, which is so far unreported. Passive imaging using interferometric aperture synthesis requires a large number of antennas and wide bandwidth to provide good radiometric sensitivity. The major challenge for realizing an imager using such a technique is the complexity of the correlator. Use of analog technology for largescale correlation is not feasible, if not impossible. Even the digital correlator requires a very complex data distribution network that must connect every input signal to multiple processing devices while maintaining the same path lengths for equal delays in all the channels. By implementing a massive correlation in a single field-programmable gate array (FPGA), this correlator design provides a way to reduce the complexity by reducing the number of devices needed to achieve the required processing. Processing of high-speed input data is realized in partially parallel datapaths to achieve a bandwidth of 1 GHz. Integrating a large number of correlator channels in a single device is enabled by the hierarchical design approach. It is implemented using Xilinx Kintex UltraScale XCKU115 device. Its functional verification is performed in simulation to check the correctness of the correlation results. Hardware testing is performed using linearfeedback shift registers for on-chip random data generation, and the results are compared with the expected results calculated offline using MATLAB.