As data-centric applications proliferate, mitigating Write Amplification Factor (WAF) in SSDs has become critical for sustaining performance and longevity. Flexible Data Placement (FDP), a recently ratified NVMe standard, addresses this by allowing hosts to guide data placement while retaining block interface compatibility. However, research on FDP is constrained by the scarcity of prototype device and the lack of emulation tools supporting its multi-stream architecture. In this paper, we propose FDPEmu, a high-fidelity FDP emulator extended from FEMU. FDPEmu addresses the architectural limitations of legacy emulators by implementing core FDP data structures, per-RUH write pointers, and isolation-aware Garbage Collection (GC). We also introduce Striding, a dynamic channel offset allocation technique, to mitigate channel contention in multi-stream environments. Validation against prototype FDP SSDs demonstrates high fidelity ($r \gt 0.89$ for skewed workloads) in capturing WAF trends, confirming the emulator as a credible research platform. Furthermore, our case studies on RocksDB and F2FS reveal that strictly separating data is not universally beneficial. We demonstrate that the effectiveness of isolation policies relies heavily on workload patterns, indicating that optimal FDP strategies must carefully balance data lifetime separation with effective resource utilization.

Currently, there are two representative non-volatile dual in-line memory module (NVDIMM) interfaces: a proprietary Intel DDR-T and the JEDEC NVDIMM-P, which are not supported by existing platforms. Adoption of new platform is costly and measuring its efficiency of migrating to the new platform is much more complex. This study is an alternative way of them—finding a new memory device that can be supported by all existing systems. In this paper, we propose an NVDIMM architecture with several system-wide mechanisms to allow the synchronous DDR4 memory interfaces to support non-deterministic (asynchronous) timing. The proposed memory architecture is implemented as a real device prototype, and also evaluated using synthetic and real workloads on an x86-64 server system.