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Yuuji Yoshida

dblp:22/2886 · DBLP profile ↗
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7ranked-venue papers
0as first author
0since 2021 · last 2003
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 4Systems, architecture and hardware · 2Graphics, computer vision, multimedia, augmented reality and games · 2Software engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 49% Interconnection networks and networks-on-chip · 49% Parallel and multicore computing · 2%
Theoretical computer science
1 paper
Algorithms and data structures · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › error control
error detection and recovery
0.012003
A 1.3GHz fifth generation SPARC64 microprocessor · DAC 2003
Processor architecture and microarchitecture
microprocessor design
0.012003
A 1.3GHz fifth generation SPARC64 microprocessor · DAC 2003
Parallel and multicore computing › parallel algorithms
parallel search
0.011979
A Parallel Searching Scheme for Multiprocessor Systems and Its Application to Combinatorial Problems · IJCAI 1979
Algorithms and data structures › search algorithms
combinatorial search
0.011979
A Parallel Searching Scheme for Multiprocessor Systems and Its Application to Combinatorial Problems · IJCAI 1979

Methods — techniques the papers use, named apart from their topics

error detection and recovery · 0.0SOI CMOS · 0.0parallel search · 0.0
YearPublicationVenuePosition
2003 A 1.3GHz fifth generation SPARC64 microprocessor
abstract
A 5th generation SPARC64 processor is fabricated in 130nm SOI CMOS process with 8 layers of Cu metallization. It runs at 1.3GHz with 34.7W power dissipation in the laboratory. The chip contains over 190M transistors with 19M in logic circuits. The chip size is 18.14mm x 15.99mm. The error detection and recovery mechanism is implemented for execution units and data path logic circuits in addition to on-chip arrays to detect and recover from data logic error. This processor is developed by using mostly in-house CAD tools.
Hisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama
DAC2
1990 Structural description and classification of signature images
Maan Ammar, Yuuji Yoshida, Teruo Fukumura
Pattern Recognit.2
1988 Editing model based on the object-oriented approach
abstract
The authors propose a fundamental framework for the editing facility applicable to uniform manipulation for various kinds of data. The basic principle is to separate the object scheme and the data instance from the editing data extractively. This separation method makes it possible to specify various kinds of data under explicitly structured forms and then manipulate them with the uniform access paths. The editing model has an object-oriented feature based on the relational data model. The design concept of the editing mechanism is described in detail. Integration and functionality issues are addressed.>
Toyohide Watanabe, Yuuji Yoshida, Teruo Fukumura
COMPSAC2
1988 Description of signature images and its application to their classification
abstract
A method for signature description based on the human way of recognizing objects is introduced. Like humans, this method first recognizes objects globally and then recognizes finer details. The description is hierarchical: the signature is at the top level, and each lower level gives more details about the higher one. Features are extracted in a relative way (e.g. the length is measured by its ratio to the width) to make the method insensitive to the natural variations that occur in genuine signatures, and are mapped into a conceptual description. This conceptual description is then used to classify the signature images.>
Maan Ammar, Yuuji Yoshida, Teruo Fukumura
ICPR2
1988 Off-Line Preprocessing and Verification of Signatures
abstract
This paper introduces an effective method for signature separation from nonhomogeneous noisy background. It also introduces a solution to the problem of simulated signature verification in off-line systems. Extraction of shape and density features and the effectiveness of using each and both of them are discussed in the light of experimental results.
Maan Ammar, Yuuji Yoshida, Teruo Fukumura
Int. J. Pattern Recognit. Artif. Intell.2
1984 The Architecture and Efficiency of DON: A Combinatorial Problem Oriented Multicomputer System
Masaharu Imai, Yuuji Tateizumi, Yuuji Yoshida, Teruo Fukumura
ICDCS3
1979 A Parallel Searching Scheme for Multiprocessor Systems and Its Application to Combinatorial Problems
Masaharu Imai, Yuuji Yoshida, Teruo Fukumura
IJCAI2