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Demo Data from EDBT 2026 / reviewers in the wild / expert

Raymond Pang

dblp:22/353 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2000
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 77% Reconfigurable computing and FPGAs · 23%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › digital circuit design
cryptographic hardware		 0.012000
A 12 Gbps DES Encryptor/Decryptor Core in an FPGA · CHES 2000
Reconfigurable computing and FPGAs › FPGA-based hardware security
FPGA-based cryptographic implementation		 0.012000
A 12 Gbps DES Encryptor/Decryptor Core in an FPGA · CHES 2000

Methods — techniques the papers use, named apart from their topics

FPGA implementation · 0.0DES · 0.0
YearPublicationVenuePosition
2000 A 12 Gbps DES Encryptor/Decryptor Core in an FPGA
Steven Trimberger, Raymond Pang
 CHES2