Demo Data from EDBT 2026 / reviewers in the wild / expert
Yannick Teglia
dblp:22/628
· DBLP profile ↗
11ranked-venue papers
0as first author
2since 2021 · last 2025
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 7Software engineering, systems software and programming languages · 3 · 1 since 2021Systems, architecture and hardware · 2 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
4 papers |
Hardware security and side channels · 70% Cryptographic primitives and cryptanalysis · 30% |
Topics — the 8 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels
side-channel attack |
0.8 | 3 | 2018 | Multivariate High-Order Attacks of Shuffled Tables Recomputation · J. Cryptol. 2018 Taylor Expansion of Maximum Likelihood Attacks for Masked and Shuffled Implementations · ASIACRYPT (1) 2016 Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015 |
Hardware security and side channels › side-channel attack
higher-order side-channel attack |
0.3 | 1 | 2018 | Multivariate High-Order Attacks of Shuffled Tables Recomputation · J. Cryptol. 2018 |
Hardware security and side channels › side-channel countermeasures
masking |
0.3 | 2 | 2016 | Taylor Expansion of Maximum Likelihood Attacks for Masked and Shuffled Implementations · ASIACRYPT (1) 2016 Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015 |
Cryptographic primitives and cryptanalysis › cryptanalysis › statistical cryptanalysis
maximum likelihood attack |
0.2 | 1 | 2016 | Taylor Expansion of Maximum Likelihood Attacks for Masked and Shuffled Implementations · ASIACRYPT (1) 2016 |
Cryptographic primitives and cryptanalysis › differential cryptanalysis
higher-order differential attacks |
0.2 | 1 | 2015 | Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015 |
Cryptographic primitives and cryptanalysis › cryptographic implementation
block cipher implementation |
0.1 | 1 | 2018 | Multivariate High-Order Attacks of Shuffled Tables Recomputation · J. Cryptol. 2018 |
Cryptographic primitives and cryptanalysis
block cipher |
0.1 | 1 | 2015 | Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015 |
Hardware security and side channels
side-channel countermeasures |
0.0 | 1 | 2004 | Leak Resistant Arithmetic · CHES 2004 |
Methods — techniques the papers use, named apart from their topics
taylor expansion · 0.2multivariate high-order attacks · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | BAIT: A New DNN Backdoor Attack Using Inpainted TriggersabstractBackdoor attacks compromise deep neural networks by injecting them with covert, malicious behaviors during training. A backdoor can then be activated at test-time using a trigger pattern. As backdoors become more sophisticated, defenses struggle to catch up. This paper introduces a simple yet effective input-specific Backdoor Attack using Inpainted Triggers, dubbed BAIT. Its trigger relies on a randomly-drawn polygonal patch, filled via inpainting with an off-the-shelf generative adversarial network. We show with BAIT that several defenses, including common test-time input purification methods, can be bypassed by patch-based backdoors. To counter this new attack, we propose four defense recommendations. Quentin Le Roux, Yannick Teglia, Eric Bourbao, Philippe Loubet-Moundi, Teddy Furon |
ICIP | 2 |
| 2022 | Recovering Information on the CVA6 RISC-V CPU with a Baremetal Micro-Architectural Covert ChannelabstractIn this work, we study the micro architectural vulnerabilities of the open-source RISC-V CPU named CVA6. We build a realistic scenario for extracting information and propose an analysis on how to reduce the impact of noise on the attack, while staying as close as possible to hardware level through baremetal simulations. Valentin Martinoli, Yannick Teglia, Abdellah Bouagoun, Régis Leveugle |
IOLTS | 2 |
| 2019 | Remote Side-Channel Attacks on Heterogeneous SoC
Joseph Gravellier, Jean-Max Dutertre, Yannick Teglia, Philippe Loubet-Moundi, Francis Olivier |
CARDIS | 3 |
| 2018 | Multivariate High-Order Attacks of Shuffled Tables Recomputation
Nicolas Bruneau, Sylvain Guilley, Zakaria Najm, Yannick Teglia |
J. Cryptol. | 4 |
| 2016 | Taylor Expansion of Maximum Likelihood Attacks for Masked and Shuffled Implementations
Nicolas Bruneau, Sylvain Guilley, Annelie Heuser, Olivier Rioul, François-Xavier Standaert, Yannick Teglia |
ASIACRYPT (1) | 6 |
| 2015 | Multi-variate High-Order Attacks of Shuffled Tables Recomputation
Nicolas Bruneau, Sylvain Guilley, Zakaria Najm, Yannick Teglia |
CHES | 4 |
| 2014 | On the assumption of mutual independence of jitter realizations in P-TRNG stochastic modelsabstractSecurity in true random number generation in cryptography is based on entropy per bit at the generator output. The entropy is evaluated using stochastic models. Several recent works propose stochastic models based on assumptions related to selected physical analog phenomena such as noise or jittery signal and on the knowledge of the principle of randomness extraction from the obtained analog signal. However, these assumptions simplify often considerably the underlying analog processes, which include several noise sources. In this paper, we present a new comprehensive multilevel approach, which enables to build the stochastic model based on detailed analysis of noise sources starting at transistor level and on conversion of the noise to the clock jitter exploited at the generator level. Using this approach, we can estimate proportion of the jitter coming only from the thermal noise, which is included in the total clock jitter. Patrick Haddad, Yannick Teglia, Florent Bernard, Viktor Fischer |
DATE | 2 |
| 2011 | Information Leakage Discovery Techniques to Enhance Secure Chip Design
Alessandro Barenghi, Gerardo Pelosi, Yannick Teglia |
WISTP | 3 |
| 2011 | Shape analysis for power signal cryptanalysis on secure components
Frédérique Robert-Inacio, Alain Trémeau, Mike Fournigault, Yannick Teglia, Pierre-Yvan Liardet |
J. Syst. Softw. | 4 |
| 2010 | Improving first order differential power attacks through digital signal processingabstractSide-channel attacks pose a critical threat to the deployment of secure embedded systems. Differential-power analysis is a technique relying on measuring the power consumption of device while it computes a cryptographic primitive, and extracting the secret information from it exploiting the knowledge of the operations involving the key. There is no open literature describing how to properly employ Digital Signal Processing (DSP) techniques in order to improve the effectiveness of the attacks. This paper presents a pre-processing technique based on DSP, reducing the number of traces needed to perform an attack by an order of magnitude with respect to the results obtained with raw datasets, and puts it into practical use attacking a commercial 32-bit software implementation of AES running on a Cortex-M3 CPU. The main contribution of this paper is proposing a leakage model for software implemented cryptographic primitives and an effective framework to extract it. Alessandro Barenghi, Gerardo Pelosi, Yannick Teglia |
SIN | 3 |
| 2004 | Leak Resistant Arithmetic
Jean-Claude Bajard, Laurent Imbert, Pierre-Yvan Liardet, Yannick Teglia |
CHES | 4 |