Optical wireless communication (OWC) leverages the terahertz-scale optical spectrum to enable ultra-fast data transfer, offering a compelling alternative to often-congested radio frequency systems. However, the highly directional nature of optical signals and their susceptibility to obstruction inherently limit coverage and reliability, particularly in dynamic indoor environments. To overcome these limitations, we propose apervasive optical wireless medium (POWM)framework that transforms indoor spaces into a dynamically controllable optical propagation medium. POWM deploys a distributed network ofprogrammable optical amplifiers (POAs)– devices with tunable gains to extend coverage through diffuse reflections while compensating for signal attenuation. A key challenge in POWM is preventing amplifier saturation from feedback loops. We rigorously derive stability constraints to guarantee system robustness. Beyond coverage extension, POWM dynamically adjusts POA gains in response to user locations and channel conditions, enhancing signal-to-noise ratio, balancing resource allocation, and suppressing interference. As the first framework to harness diffuse reflection for controllable optical propagation, we validate POWM’s effectiveness through analytical modeling, simulations, and prototyping. Proof-of-concept experiments using an infrared-only prototype in a controlled, small-scale setup (1.8 × 1.8m2area) show that the POWM framework can deliver up to a 7 dB improvement in SNR and a tenfold reduction in packet loss. This work lays a foundational framework for future robust, high-speed indoor OWC networks.

This work investigates the design of an omnidirectional optical transceiver, to enable reliable inter-robot communication in mobile settings. The design addresses challenges stemming from the intrinsic directional nature of light, which can restrict signal coverage area and destabilize connections during robot movement. Our experiments demonstrate the system's capability to establish reliable high-speed optical communication links within a circular coverage zone of over 3 meters in radius. Our work advances the state-of-the-art in two significant ways: First, to our knowledge, this is the first demonstration of an omnidirectional optical communication system aligned with the IEEE 802.11bb standard. Second, the system leverages channel diversity to enhance signal quality by incorporating hardware-based omnidirectional signal combinations at the receiver, an analog signal-format agnostic method compatible with Wi-Fi and other wireless signals without modifying the underlying wireless system's digital signal processing chain.

Understanding program behavior is crucial in computer architecture research, but the growing size of benchmarks makes analyzing and simulating entire programs increasingly challenging. In practice, researchers often select representative program intervals for analysis and testing. These intervals are different sections of continuous execution of a program. SimPoint is a well-known method for selecting representative intervals using hardware-independent information. However, when focusing on a specific microarchitecture study, it is desirable to select intervals that are more relevant to that study. For instance, intervals with more branch mispredictions are more appropriate for branch prediction studies. We refer to these intervals as “tailored intervals” for branch prediction studies. This paper presents a Multi-level Behavior Analysis guided Program Interval Selection (MBAPIS) for selecting tailored intervals. For a given microarchitecture study, the first level of MBAPIS uses hardware performance counters to prioritize selecting the intervals that exhibit clearer microarchitectural characteristics relevant to that study. The second level analyzes the processor performance bottlenecks to further select the intervals where the concerned microarchitecture design more strongly impacts performance. Finally, MBAPIS performs clustering analysis with the basic block information of each interval selected by the first two levels, and selects the representative intervals among them while preserving the diverse software behavior. Additionally, we present a general and extensible interval-replaying design to accurately re-execute selected intervals. The SPEC CPU2006 and CPU2017 benchmarks are used for evaluation. The results demonstrate that MBAPIS can select representative and tailored intervals for two typical microarchi-tecture studies and deliver accurate estimates of the concerned hardware events for all tailored intervals in each benchmark, with an average error rate of less than 1.5%. Moreover, the interval-replaying design effectively restores the hardware behavior of the intervals selected by MBAPIS, with an average relative error rate of annroximately 1.4%.

Open-source processors and FPGA provide more real and accurate results of the new microarchitecture design, but the long execution time for running large benchmarks on FPGA boards still hinders researchers. This paper proposes a hardware-software cooperative interval-replaying. It uses simula-tors to create checkpoints for arbitrary program intervals and provides an extensible and portable checkpoint loader to re-execute selected intervals. In addition, this paper extends RISC-VISA and proposes an event-based sampling design to find hot program intervals with more representative microarchitecture characteristics. By using checkpoints in hot regions, researchers can quickly verify the effectiveness of microarchitecture designs on FPGA and alleviate the speed bottleneck of FPGA. The correctness and effectiveness of the checkpoint scheme and the event-based sampling design are evaluated on FPGA. The experimental results show that the solution is effective.

High-speed and energy-efficient multi-port content addressable memory (CAM) is very important to modern superscalar processors. In order to overcome the disadvantages of multi-port CAM and improve the performance of searching stage, a high-speed and energy-efficient single-port (SP) CAM is introduced to achieve dual-port (DP) operation. For different bit cell topologies - the traditional 9T CAM cell and 6T SRAM cell, two novel peripheral schemes - CShare and VClamp are proposed. The proposed schemes are verified using all possible corners, a wide range of temperature and detailed Monte-Carlo variation analysis. With 65-nm process and 1.2 V supply, the search delay of CShare and VClamp is 0.55 ns and 0.6 ns, respectively, a reduction of approximately 87% compared to the state-of-the-art works. In addition, compared with the recently proposed IOT BCAM, CShare and VClamp can provide 84.9% and 85.1% energy reduction in the TT corner, respectively. Experimental results in an 8 Kb CAM at 1.2 V supply and across different corners show that the energy efficiency is improved by 45.56% (CShare) and 45.64% (VClamp) on average in comparison with DP CAM.

Caches have been used to construct various covert and side channels. Most existing cache channels exploit the timing difference between cache hits and cache misses. We highlight that cache misses in different states may have more significant time differences. This paper presents in detail how replacement latency differences can be used to construct timing-based channels (called WB channels) to leak information. Any modification to a cache line by a sender will set it to the dirty state, and the receiver can observe this through measuring the latency of replacing this cache set. This paper evaluates WB channels from implementation complexity, stability, scalability, bandwidth, and stealthiness. Experimental results show that WB channel can not only transmit information covertly with high bandwidth but also has the strong anti-interference ability. Moreover, many previous cache defense and detection mechanisms target attacks exploiting the timing difference between cache hits and cache misses. This paper discusses the effectiveness of the WB channels against some such strategies. Moreover, this paper shows how to use our WB channel to mount a side-channel attack against a real-world security-sensitive application, such as AES implemented in OpenSSL-1.0.1e.