Embedded systems based on Microcontroller Units (MCUs) often gather significant quantities of data and solve various issues. Convolutional Neural Networks (CNNs) have proven their effectiveness in solving computer vision and natural language processing tasks. However, implementing CNNs within MCUs is challenging due to their high inference costs, which varies widely depending on hardware targets and CNN topologies. Despite state-of-the-art advancements, no efficient design space exploration solutions handle the wide variety of implementation solutions. In this article, we introduce the ZIP-CNN design space exploration methodology, which facilitates CNN implementation within MCUs. We developed a model that quantitatively estimates the latency, energy consumption, and memory space required to run a CNN within an MCU. This model accounts for algorithmic reductions such as knowledge distillation, pruning, or quantization and applies to any CNN topology. To demonstrate the efficiency of our methodology, we investigated LeNet5, ResNet8, and ResNet26 within three different MCUs. We made materials and supplementary results available in a GitHub repository: https://github.com/ThGbay/ZIP-CNN . The proposed method was empirically verified on three hardware targets running at 14 different operating frequencies. The three CNN topologies investigated were implemented in their default configuration in FP32, and also reduced with INT8 quantization, pruning at five different rates and with knowledge distillation. The estimates of our model are very reliable with an error of 3.29% to 15.23% for latency, 3.12% to 10.34% for energy consumption, and 1.95% to 6.31% for memory space. These results are based on on-device measurements.

Falls represent the main risk of injury for elderly people. One-third of adults aged over 65 and half of people over 80 will have at least one fall a year. People at risk should visit a clinical service to detect gait difficulties. Solutions for detecting daily activities are being studied more and more, aiming to develop a complementary method to early detect this type of health risk as effectively as possible. Non-intrusiveness in the person's life for this type of problem is an important criterion, which is why current research is focusing on solutions involving non-conventional imagery such as radar systems. This paper presents an embedded system for classifying daily activities based on the processing of micro-Doppler images. The implementation of the pre-processing chain with a filter enables the acquisition of detailed spectrograms, which proves to be effective in detecting walking. Additionally, by porting it onto the Jetson Orin, it could be possible to accelerate the inference phase of the classification model. We used the ResNet-18 classification method to classify six human activities: Walking, Sitting, Standing, Picking up objects, Drinking water, and Fall events. The results showed that the model is capable of recognising most of the activities on real data.

The correlation between an ageing population glob- ally and the increased risk of falling is a real challenge for health care infrastructures. This calls for the development of new ways to monitor the elderly at home. The confidentiality of radar data coupled with its richness of information can address weaknesses of existing technologies, namely, privacy and acceptance. The radar data produce a large quantity of data that needs to be processed in real-time to ensure a timely detection of fall/critical events necessary for the well-being of the elderly. We introduce a new embedded architecture using a G PU allowing a gain in processing time compared to CPU alone. We used an off- the-shelf frequency-modulated continuous-wave (FMCW) radar (Ancortek model SDR 980AD2). It is followed by a pre-processing chain consisting of a Fast Fourier Transform, Filter and Short Time Fourier Transform (STFT) to obtain time-velocity maps or spectrograms to extract characteristics of human activities such as walking. An implementation with cuFFT on Jetson Xavier increases the performance margin for the downstream of the processing chain, the acceleration factor being 10.49 compared to state-of-the-art CPU architecture. Continuous monitoring of the subject will save lives, minimize injuries, reduce anxiety and prevent post-fall syndrome (PDS).

The computing continuum's actual trend is facing a growth in terms of devices with any degree of computational capability. Those devices may or may not include a full-stack, including the Operating System layer and the Application layer, or just facing pure bare-metal solutions. In either case, the reliability of the full system stack has to be guaranteed. It is crucial to provide data regarding the impact of faults at all system stack levels and potential hardening solutions to design highly resilient systems. While most of the work usually concentrates on the application reliability, the special session aims to provide a deep comprehension of the impact on the reliability of an embedded system when faults in the hardware substrate of the system stack surface at the Operating System layer. For this reason, we will cover a comparison from an application perspective when hardware faults happen in bare metal vs. real-time OS vs. general-purpose OS. Then we will go deeper within a FreeRTOS to evaluate the contribution of all parts of the OS. Eventually, the Special Session will propose some hardening techniques at the Operating System level by exploiting the scheduling capabilities.

Small satellites, such as CubeSats, have to respect time, spatial and energy constraints in the harsh space environment. To tackle this issue, this paper presents and evaluates two fault tolerant online scheduling algorithms: the algorithm scheduling all tasks as aperiodic (called ONEOFF) and the algorithm placing arriving tasks as aperiodic or periodic tasks (called ONEOFF & CYCLIC). Based on several scenarios, the results show that the performances of ordering policies are influenced by the system load and the proportions of simple and double tasks to all tasks to be executed. The “Earliest Deadline” and “Earliest Arrival Time” ordering policies for ONEOFF or the “Minimum Slack” ordering policy for ONEOFF & CYCLIC reject the least tasks in all tested scenarios. The paper also deals with the analysis of scheduling time to evaluate real-time performances of ordering policies and shows that ONEOFF requires less time to find a new schedule than ONEOFF & CYCLIC. Finally, it was found that the studied algorithms perform well also in a harsh environment.

This paper is aimed at studying fault-tolerant design of the realtime multi-processor systems and is in particular concerned with the dynamic mapping and scheduling of tasks on embedded systems. The effort is concentrated on scheduling strategy having reduced complexity and guaranteeing that, when a task is input into the system and accepted, then it is correctly executed prior to the task deadline. The chosen method makes use of the primary/backup approach and this paper describes its refinement based on reduction of windows within which the primary and the backup copies can be scheduled. The results show that the use of restricted scheduling windows reduces the algorithm complexity by up to 15%.