Sheng-Di Lin

dblp:220/9155 · DBLP profile ↗
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3ranked-venue papers
0as first author
3since 2021 · last 2023
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 since 2021
YearPublicationVenuePosition
2023 A Stack-Based In-Pixel Storage Circuit for SPAD Photon Counting
abstract
Single-photon avalanche diodes (SPADs) have attracted a lot of attention these days because of the ability to detect a single photon for many emerging applications. However, planar SPAD sensor arrays often suffer from serious photon loss because the readout bottleneck dominates the overall dead time. This paper presents a stack-based in-pixel storage circuit for high-throughput SPAD imaging. The proposed circuit helps a SPAD imaging chip solve the buffer saturation problem and reduces its dead time by half compared to single-bit storage. Fabricated in TSMC HV$0.18\ \mu \mathrm{m}$CMOS technology, each pixel in the SPAD array can record at most three photons in 50 ns, resulting in 40Mfps. The minimum integration time to form an 8-bit image is reduced to$6.4\ \mu \mathrm{s}$while maintaining global shutter exposure.
Tzu-Yun Huang, Hsi-Hao Huang, Chun-Hsien Liu, Sheng-Di Lin, Chen-Yi Lee
ISCAS4
2023 Self-Restoring and Low-Jitter Circuits for High Timing-Resolution SPAD Sensing Applications
abstract
Single-photon avalanche diode (SPAD) imagers have recently emerged in the fields of high-resolution imaging, such as fluorescence lifetime imaging microscopy. This paper presents a new design of passive quenching active reset (PQAR) circuit for high timing-resolution SPAD imagers. The PQAR circuit contains a logic control circuit for self-restoring and dead time reduction in the event of two adjacent incoming photons. Post-layout simulation result shows that the dead time of the sensor has been reduced to 5.46 ns for two adjacent incoming photons, and measurement result shows that the jitter of the photon-induced signal width has been reduced to 63ps. We also present the properties and measurement results of the passive quenching passive reset circuit and the passive quenching active clock-driven reset circuit. Comparison shows that of the three circuits we demonstrate, the PQAR circuit is better suited for the high timing-resolution SPAD imagers.
Hsi-Hao Huang, Chun-Hsien Liu, Tzu-Yun Huang, Sheng-Di Lin, Chen-Yi Lee
ISCAS4
2021 The Performance-Complexity Efficient Time-to-Digit and Data-Processing Chips Design and Validation for a LiDAR System
abstract
Light Detection and Ranging (LiDAR) is a high-price system for wide-usage automotive driving requirements. The design, implementation, and validation of a performance-complexity efficient LiDAR system are introduced in this paper. A Time-to-Digit (TDC) chip with a low-cost Data-Processing (DP) chip is utilized in this system. The proposed chips have been well validated and can be utilized as processing cores for a generic LiDAR system. The measurement accuracy is a comparison with a high-price commercial product of Time-Correlated Single-Photon-Counting (TCSPC). The values show the proposed system accuracy is respectable for the comparison by many distances from 4.8m to 44.6m, the maximum difference is 0.3%.
Ching-Hwa Cheng, Ching-Kun Chao, Kai-Chun Yeh, Don-Gey Liu, Sheng-Di Lin
ISCAS5