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Wenqian Xie

dblp:221/2289 · DBLP profile ↗
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5ranked-venue papers
4as first author
3since 2021 · last 2026
0000-0001-9638-1896ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 3 · 2 first-author · 2 since 2021Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 87% GPUs and heterogeneous computing · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › processor performance modeling
accelerator performance modeling
1.012026
CloserToMe: A Unified Framework for Accurate and Transferable Latency Prediction Across Heterogeneous Devices · AAAI 2026
Performance modeling and evaluation › performance prediction
latency prediction
1.012026
CloserToMe: A Unified Framework for Accurate and Transferable Latency Prediction Across Heterogeneous Devices · AAAI 2026

Methods — techniques the papers use, named apart from their topics

hardware-operation interaction modeling · 1.0device behavior profiling · 1.0capability vectors · 1.0
YearPublicationVenuePosition
2026 CloserToMe: A Unified Framework for Accurate and Transferable Latency Prediction Across Heterogeneous Devices
abstract
Hardware accelerators such as GPUs, NPUs, and FPGAs are essential to meeting AI’s computational demands. With the proliferation of heterogeneous devices across cloud and edge, various model optimization techniques adapt to diverse hardware characteristics through operator transformations and structural modifications. Accurate, efficient latency prediction enables rapid selection of optimal strategies across hardware backends. Many existing methods treat hardware as a black-box executor, directly regressing latency without explicitly modeling the intricate interactions between neural network (NN) structures and device-specific execution behaviors. To address these challenges, we introduce a new modeling perspective that captures the interaction between neural architectures and hardware execution. To capture device-specific characteristics, we propose two complementary modeling strategies. The Device Behavior Signature Selector (DBSel) characterizes hardware execution behavior by selectively probing a small set of representative architectures, forming a compact, workload-driven profile. In parallel, we construct capability vectors that capture the hierarchical memory of each device and compute characteristics, providing a structured abstraction of its architectural capacity. To unify both behavioral and structural views, we introduce the Hardware–Operation Dialogue Module (HODM), which models fine-grained interactions between neural operators and hardware properties. Together, these components empower CloserToMe to deliver accurate and transferable latency predictions across unseen and diverse platforms.
Cheng Tang 0004, Guochong Sui, Wenqi Lou, Jiayi Tuo, Wenqian Xie, Yinkang Gao, Yixuan Zhu, Lei Gong 0003, Chao Wang 0003, Xuehai Zhou
AAAI6
2025 Capricorn: Efficient In-Memory Checkpointing for MoE Model Training with Dynamicity Awareness
abstract
Mixture-of-Experts (MoE) has been extensively adopted for its incredible capability to expand model scale with a sub-linear increase in computational requirement. Training MoE models requires substantial computing nodes and extended periods, necessitating reliable distributed training systems. Checkpointing is a common approach to enhance training reliability by periodically saving model states. Current checkpointing optimizations focus on hiding checkpoint overhead in model training computations. However, these approaches overlook the dynamicity inherent in distributed MoE training, leading to an inefficient checkpointing mechanism. In this paper, we propose Capricorn, a dynamicity-aware in-memory checkpointing approach for efficient MoE model training. We observe that the dynamicity impacts computation durations at both the layer and iteration levels. At the layer level, different model layers exhibit various computation durations, while at the iteration level, the computation time of the same layer differs across iterations. To adapt to the layer-level dynamicity, Capricorn employs online profiling at the granularity of individual layers. Based on the profiling results, it strategically partitions checkpoints into chunks and schedules checkpointing communication to overlap with model computations. To deal with the dynamicity across iterations, Capricorn speculatively activates the profiling and partitioning processes utilizing the temporal locality of the experts' load. It can produce an optimal activation for low runtime overhead with high checkpoint partition accuracy. For mainstream MoE models, Capricorn achieves up to$1.56 \times$and$5.98 \times$end-to-end training speedup over Gemini and TorchSnapshot respectively under per-iteration checkpointing.
Wenqian Xie, Zhiquan Lai, Yanqi Hao, Dongsheng Li 0001
CLUSTER1
2022 A novel event-triggered asynchronous H∞ control for T-S fuzzy Markov jump systems under hidden Markov switching topologies
Wenqian Xie, Sing Kiong Nguang, Hong Zhu 0001, Kaibo Shi
Fuzzy Sets Syst.1
2019 Finite-time asynchronous H∞ resilient filtering for switched delayed neural networks with memory unideal measurements
Wenqian Xie, Hong Zhu 0001, Jun Cheng 0004, Shouming Zhong, Kaibo Shi
Inf. Sci.1
2018 New results for uncertain switched neural networks with mixed delays using hybrid division method
Wenqian Xie, Hong Zhu 0001, Shouming Zhong, Hao Chen 0021
Neurocomputing1