Demo Data from EDBT 2026 / reviewers in the wild / expert
Nitish Bhat
dblp:223/0846
· DBLP profile ↗
2ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0004-6127-6454ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Memory systems · 80% Storage systems · 20% | |
| Computer networks
1 paper |
Routing and switching · 77% Datacenter networks · 23% | |
| Databases, data mining, and information retrieval
1 paper |
Indexing and storage engines · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Routing and switching
switch buffer management |
1.0 | 1 | 2026 | Toasty: Speeding Up Network I/O with Cache-Warm Buffers · ASPLOS (2) 2026 |
Memory systems
cache management |
1.0 | 1 | 2026 | Toasty: Speeding Up Network I/O with Cache-Warm Buffers · ASPLOS (2) 2026 |
Storage systems › key-value storage
LSM-tree |
0.3 | 1 | 2018 | Redesigning LSMs for Nonvolatile Memory with NoveLSM · USENIX ATC 2018 |
Memory systems
non-volatile memory |
0.3 | 1 | 2018 | Redesigning LSMs for Nonvolatile Memory with NoveLSM · USENIX ATC 2018 |
Datacenter networks
kernel bypass |
0.3 | 1 | 2026 | Toasty: Speeding Up Network I/O with Cache-Warm Buffers · ASPLOS (2) 2026 |
Indexing and storage engines
LSM-tree |
0.1 | 1 | 2018 | Redesigning LSMs for Nonvolatile Memory with NoveLSM · USENIX ATC 2018 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Toasty: Speeding Up Network I/O with Cache-Warm BuffersabstractModern NICs DMA packets directly to the LLC using technologies like DDIO, reducing access latencies for networking applications. Prior work has observed several performance issues with DDIO when the working set of packet buffers does not fit into LLC. For example, the leaky DMA problem arises when incoming packets evict older packets that have not yet been processed by the application from LLC, causing them to be fetched again from main memory. While using a smaller pool of packet buffers that fits in cache is an obvious solution, this may result in the NIC running out of buffers to DMA packets into when a burst of packets arrives. This paper proposes Toasty, a system that mitigates this tradeoff between high throughput and resilience to packet loss that arises when sizing the network packet buffer pool. While prior work has proposed hardware-based solutions to this problem, Toasty is a software-only solution that can be deployed on commodity NIC hardware. Toasty manages the packet buffer pool as a LIFO stack instead of a FIFO queue, and adapts the number of buffers populated into the NIC hardware RX ring based on incoming packet load and application processing rate. Together, these changes enable Toasty to recirculate a small working set of cache-warm buffers in steady state, while falling back to a larger pool of buffers during traffic bursts. We implement Toasty over the AF_XDP kernel bypass framework, and our evaluation shows that Toasty improves network throughput for a variety of network functions by up to 78% over the default buffer pool implementation of AF_XDP. We also show that Toasty matches the performance of a small buffer pool that fits in cache, while being more resilient to traffic bursts. Nitish Bhat, Ashwin Kumar, Mythili Vutukuru |
ASPLOS (2) | 2 |
| 2018 | Redesigning LSMs for Nonvolatile Memory with NoveLSM
Sudarsun Kannan, Nitish Bhat, Ada Gavrilovska, Andrea C. Arpaci-Dusseau, Remzi H. Arpaci-Dusseau |
USENIX ATC | 2 |