The Sparse General Matrix-Matrix Multiplication (SpGEMM) is widely used in a variety of applications. However, research on optimizing SpGEMM for high-performance digital signal processors (DSPs) has been limited. We present VES, a method to accelerate SpGEMM on multi-core DSPs, using the FT-M7032 platform as a case study. Based on the ESC algorithm, VES enhances computational efficiency through vectorized expansion operations, a double-buffering strategy, and an optimized vectorized sorting method. We provide an in-depth analysis of the bottlenecks in vectorized sorting and introduce an efficient vectorized reduction method that significantly improves instruction-level pipeline throughput. Experimental results show that VES outperforms existing methods HASH, ESC, and SPA by an average of 1.12×, 1.90×, and 22.34× on 1,931 sparse matrices, with maximum speedups of 8.69×, 65.9×, and 821.6×, respectively.

Support Vector Machine (SVM) is highly effective at processing high-dimensional, nonlinear data. However, more than 90 % of the training time is spent on kernel matrix calculations, and existing approaches encounter challenges in adapting to heterogeneous architectures. This paper presents an adaptive dual-threshold method leveraging heterogeneous collaboration to accelerate kernel matrix computations. We also analyze the impact of the working set size on training time and accuracy in ThunderSVM to minimize training time. Tasks with distinct characteristics are allocated to appropriate computing cores through heterogeneous collaboration, with dynamic load balancing via adaptive dual thresholds. On a CPU-DSP heterogeneous platform, our method delivers an average speedup of$5.52 \times$compared to the optimal CPU-only implementation.

Modern computing architectures (e.g., multi-core CPUs, GPUs, distributed systems) rely on parallel code implemented via frameworks such as OpenMP, MPI, and CUDA. While large language models (LLMs) have shown strong performance in general code generation, they struggle with the structured reasoning required for parallel programming, such as handling concurrency, synchronization, and framework-specific semantics. In practical parallel code development, a common workflow begins with sequential code and incrementally introduces parallel directive codes. We formalize this process as the task of framework-based parallel code completion (FPCC), which involves three subtasks: identifying insertion points, selecting parallel frameworks, and completing parallel directive codes.To support this task, we construct a high-quality dataset of 16,638 framework-based parallel code pairs across six widely used frameworks, labeled with directive points, parallel frameworks, and the code of parallel directives. However, our empirical results show that six popular LLMs perform poorly on FPCC, particularly struggling with identifying insertion points and completing correct directive codes.To address these limitations, we propose HPCL, a curriculum-based fine-tuning framework that progressively improves model capabilities in insertion point identification, parallel framework selection, and parallel directive code completion. Our approach achieves substantial improvements, yielding an 17.82% increase in EM and a 5.43% improvement in DIR scores over LLM-based baselines. Finally, expert-guided error analysis reveals common failure patterns and suggests future directions, such as in retrieval-augmented completion and consistency-aware training.