Gregor Peach

dblp:224/5646 · DBLP profile ↗
← Back
5ranked-venue papers
1as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-authorSecurity and privacy · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 100%
Network and information security
1 paper
Systems and software security · 100%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems
embedded software
0.412020
eWASM: Practical Software Fault Isolation for Reliable Embedded Devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020

Methods — techniques the papers use, named apart from their topics

webassembly compilation · 0.9software sandboxing · 0.9
YearPublicationVenuePosition
2020 Sledge: a Serverless-first, Light-weight Wasm Runtime for the Edge
abstract
Emerging IoT applications with real-time latency constraints require new data processing systems operating at the Edge. Serverless computing offers a new compelling paradigm, where a user can execute a small application without handling the operational issues of server provisioning and resource management. Despite a variety of existing commercial and open source serverless platforms (utilizing VMs and containers), these solutions are too heavy-weight for a resource-constrained Edge systems (due to large memory footprint and high invocation time). Moreover, serverless workloads that focus on per-client, short-running computations are not an ideal fit for existing general purpose computing systems.
Phani Kishore Gadepalli, Sean McBride, Gregor Peach, Ludmila Cherkasova, Gabriel Parmer
Middleware3
2020 eWASM: Practical Software Fault Isolation for Reliable Embedded Devices
abstract
As we connect more microcontrollers to the Internet and employ them to control the physical world around us, their reliability and security are increasingly important. Many microcontrollers provide limited facilities for hardware isolation, and real-time OSes offer custom APIs, that require coupling applications into the ecosystem and abstractions of that specific OS to leverage isolation. This article investigates the use of software sandboxing of applications to support isolation for resource-constrained devices. Toward this, we detail the design of eWASM, a processes abstraction that adapts a popular sandbox, Wasm, for microcontrollers. eWASM provides a runtime to constrain memory accesses and control flow, enabled by our aWsm Wasm compiler. We discuss and evaluate its multiple implementations that effectively trade time and space, optimizing for the constraints of embedded systems. This enables popular languages (e.g., C) to be effectively sandboxed by software. We demonstrate performance within 40% of native C on Polybench. We believe this is a practical and compelling result for many IoT domains, and it represents the first compiled sandboxing environment for microcontrollers. We show that restrictions of the current Wasm specification lead to significant memory consumption and provide suggestions for the creation of an embedded-specific Wasm variant.
Gregor Peach, Runyu Pan, Zhuoyi Wu, Gabriel Parmer, Christopher Haster, Ludmila Cherkasova
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2019 Chaos: a System for Criticality-Aware, Multi-Core Coordination
abstract
The incentive to minimize size, weight and power (SWaP) in embedded systems has driven the consolidation both of disparate processors into single multi-core systems, and of software of various functionalities onto shared hardware. These consolidated systems must address a number of challenges that include providing strong isolation of the highly-critical tasks that impact human or equipment safety from the more feature-rich, less trustworthy applications, and the effective use of spare system capacity to increase functionality. The coordination between high and low criticality tasks is particularly challenging, and is common, for example, in autonomous vehicles where controllers, planners, sensor fusion, telemetry processing, cloud communication, and logging all must be orchestrated together. In such a case, they must share the code of the software run-time system that manages resources, and provides communication abstractions. This paper presents the Chaos system that uses devirtualization to extract high-criticality tasks from shared software environments, thus alleviating interference, and runs them in a minimal runtime. To maintain access to more feature-rich software, Chaos provides low-level coordination through proxies that tightly bound the overheads for coordination. We demonstrate Chaos's ability to scalably use multiple cores while maintaining high isolation with controlled inter-criticality coordination. For a sensor/actuation loop in satellite software experiencing inter-core interference, Chaos lowers processing latency by a factor of 2.7, while reducing worst-case by a factor 3.5 over a real-time Linux variant.
Phani Kishore Gadepalli, Gregor Peach, Gabriel Parmer, Joseph Espy, Zach Day
RTAS2
2019 Challenges and Opportunities for Efficient Serverless Computing at the Edge
abstract
Serverless computing frameworks allow users to execute a small application (dedicated to a specific task) without handling operational issues such as server provisioning, resource management, and resource scaling for the increased load. Serverless computing originally emerged as a Cloud computing framework, but might be a perfect match for IoT data processing at the Edge. However, the existing serverless solutions, based on VMs and containers, are too heavy-weight (large memory footprint and high function invocation time) for operating efficiency and elastic scaling at the Edge. Moreover, many novel IoT applications require low-latency data processing and near real-time responses, which makes the current cloud-based serverless solutions unsuitable. Recently, WebAssembly (Wasm) has been proposed as an alternative method for running serverless applications at near-native speeds, while having a small memory footprint and optimized invocation time. In this paper, we discuss some existing serverless solutions, their design details, and unresolved performance challenges for an efficient serverless management at the Edge. We outline our serverless framework, called aWsm, based on the WebAssembly approach, and discuss the opportunities enabled by the aWsm design, including function profiling and SLO-driven performance management of users' functions. Finally, we present an initial assessment of aWsm performance featuring average startup time (12μs to 30μs) and an economical memory footprint (ranging from 10s to 100s of kB) for a subset of MiBench microbenchmarks used as functions.
Phani Kishore Gadepalli, Gregor Peach, Ludmila Cherkasova, Robert C. Aitken, Gabriel Parmer
SRDS2
2018 Predictable Virtualization on Memory Protection Unit-Based Microcontrollers
abstract
With the increasing penetration of embedded systems into the consumer market there is a pressure to have all of inexpensiveness, predictability, reliability, and security. As these systems are often attached to networks and execute complex code from varying sources, reliability and security become essential. To maintain low price and small power budgets, many systems use small microcontrollers with limited memory (on the order of 128KB of SRAM). Unfortunately, the isolation and protection facilities of these systems are often lackluster, making a principled treatment of reliability and security difficult. This paper details a system that provides isolation along the three dimensions of CPU, memory, and I/O on small microcontrollers. A key challenge is providing a effective means of harnessing the limited hardware memory protection facilities of microcontrollers. This is achieved through a combination of a static analysis to make the most of limited hardware protection facilities, and a run-time based on our Composite OS. On this foundation, we build a virtualization infrastructure to execute multiple embedded real-time operating systems predictably. We show that VMs based on FreeRTOS achieve reasonable efficiency and predictability, while easily enabling scaling up to 8 VMs in 512 KB SRAM.
Runyu Pan, Gregor Peach, Yuxin Ren 0001, Gabriel Parmer
RTAS2