Technology mapping is an essential step bridging logic synthesis and physical design in the electronic design automation (EDA) flow. However, technology mapping algorithms often assume a simplified delay model and may not faithfully optimize the circuit under a realistic cost function involving area, delay, and power objectives. In this work, we introduce GradMap, a gradient-descent-based technology mapping framework that integrates a differentiable static timing analysis (STA) engine with a linear delay model for accurate delay estimation. Additionally, it enables simultaneous buffer insertion and gate sizing during technology mapping, providing a holistic optimization solution. Experimental results show that the new method achieves an average improvement of 7% in area-driven optimization, 33% in delay-driven optimization, and 25% in area-delay-product optimization compared to the ABC technology mapper. We note that although the gradient-descent method has significant runtime overhead compared to the highly efficient ABC mapper, it is highly parallelizable with GPU acceleration (in a way similar to the neural network training process), besides attaining high optimization quality far beyond ABC’s ability.

Probabilistic error cancellation (PEC) is a promising error mitigation technique that reduces the error rate without auxiliary quantum bits. However, PEC has two problems that need to be resolved: 1) there is no good PEC technique for parameterized gates and 2) sampling overhead (SO) grows exponentially with the number of PEC mitigated gates. We first propose a parameterized gate PEC (PGPEC) that mitigates the error without fully characterizing the gates, as the original PEC requires. The result shows that the number of gates requiring characterization for a thousand random circuits can be reduced by 97% or more. We next propose two novel approaches to solving the second problem. We propose a macro gate PEC (MGPEC) technique that aggregates multiple gates as a single macro gate to reduce the exponent of the SO. MGPEC reduces the SO by 49% on the QFT7 under the IBMQ noise model, which simulates real operation conditions of quantum circuits. We propose a design diversity PEC (DDPEC) technique to reduce the exponential basis of the SO. The results show that our DDPEC with design diversity check reduces overall SO by 13% on the QFT7 circuit under the IBM Q noise model. Combining the DDPEC with the MGPEC, we can reduce overall SO by 73%.

With the development of science and technology, analysis of large data is used more and more widely, such as electronic commerce, biotechnology, retail sale business, finance, education are inseparable from our life. Big data can show its value with data mining, moreover, it plays an important role in the field of education. Most researches on the exploration of education data have implications in predicting students' learning effectiveness, which can predict students' mid-term grades, final grades and semester grades with the big data analysis. The exploration of education data has been used by many research to apply the existing predictive model, thus can predict students who failed the semester exam. When there are some students who have a tendency, teachers can early to care about their learning conditions, find out the reason why they are poor in the performance, which can improve the quality of student learning. This study extends JAVA automatic grading system that our laboratory developed, increases students' operation behaviors and forecasting analysis models on the system, cooperates with four algorithms like random forest, supporting vector machine, neural network, Naive Bayes to predict and analyze the student's drop point of semester grades. This study can predict semester grade with 77% accuracy. Furthermore, this study also makes behavior analysis based on the collected data to find out the behavior model for students with low grades. The result of the study analysis can help teachers to early tutor students and improve their quality of teaching. Moreover, it plays an important role in reference value.