Precision timing is a fundamental requirement for ultralow-power Internet-of-Things (IoT) nodes, wildlife trackers, and wearable health devices. However, maintaining accuracy in these severely power-constrained systems is difficult due to the mechanical shock sensitivity of crystal oscillators (XOs). This work proposes a ratio wake-up timer (Ratio-WUT) designed to enhance XO shock resilience with very low power overhead. The system integrates a 5.58 nW XO with a secondary ultralow-power auxiliary oscillator (AuxO). A 1.75 nW digital controller actively monitors the ratio between XO and AuxO cycles, triggering an autonomous restart sequence immediately upon detecting an XO failure. Unlike conventional hybrid timers that rely on periodic wake-up checks, the Ratio-WUT provides continuous, real-time fault detection and correction. The prototype features a custom 180 nm CMOS XO and subthreshold AuxO, with control logic validated on an FPGA. Detailed postlayout analysis of a fully integrated version estimates a total power consumption of 7.33 nW. Experimental validation confirms the system’s ability to recover from mechanical shock events in real-time while maintaining wake-up functionality. By leveraging the inherent stability of the XO for timing while using the AuxO for supervision, the Ratio-WUT achieves a$3.85\times $power reduction compared to prior hybrid architectures.

Achieving precise timing in miniature systems attached to monarch butterflies is challenging due to the shock sensitivity of crystal oscillators (XOs) and the limited accuracy ofRCoscillators. This brief proposes a hybrid timestamping technique that combines both oscillators as timers to deliver shock-resistant, high-accuracy timing. Three algorithms are evaluated to fine-tune a multiplier (M), the ratio of the two timers’ speeds, for improved responsiveness and robustness against temperature and voltage variations. The direct ratioing algorithm proves the most effective, determining the correctMwithin a single wake-up cycle and reducing time shift error by 145 times in a 12-h test, compared to using anRCtimer alone. This work leverages the existing hardware and introduces new firmware, easily implementable using standard digital circuit design flows, to significantly enhance timing precision and shock resilience in millimeter-scale butterfly tracking systems, making a valuable contribution to the VLSI community.

An accurate wake-up timer is crucial for low-power wireless Internet-of-Things (IoT) devices. Although duty cycling minimizes power consumption, synchronization with a base station or other devices requires periodic activation. Inaccuracies in the wake-up timer extend the active duration around the expected synchronization time, leading to increased energy consumption, which is especially critical in high-duty-cycle operations. This article presents a low-power digital compensation method to enhance the accuracy of a crystal oscillator (XO)-based wake-up timer over varying temperatures. The proposed approach dynamically adjusts the digital counter threshold value at each wake-up to compensate for XO frequency shifts caused by temperature changes. Delta-sigma ($\Delta \Sigma $) modulation further reduces quantization noise for fractional time corrections. This work demonstrates the proposed technique on an existing low-power, miniature IoT system incorporating an exponential temperature sensor and employs two key strategies: 1) approximating the compensation curve as linear segments for simpler calculations and 2) replacing division-heavy operations with a successive approximation (SAR) method. These methods reduce the system’s time-shift error from 64.7 to 3.6 ppm using a single-point room-temperature calibration combined with adaptive temperature compensation, with a power overhead of only 7.92% (8.22 nW compensation +5.58 nW XO). Furthermore, a custom digital circuit for compensation minimizes the system power overhead to 5.07% (3.24 nW compensation +5.58 nW XO). Compared to state-of-the-art temperature-compensated XOs (TCXOs) using analog approaches, the proposed design reduces the power consumption by a factor of$2.37\times $while meeting the required time-error specification.

This paper proposes a low-power relaxation oscillator for low-power high-temperature IoT systems. It generates a 959 Hz clock signal from −40 to 170°C, consuming 6.75 nW at 0.65 V. A proposed switch-leakage compensation scheme nullifies the effects of body diode and subthreshold leakages on oscillator output frequency at high temperatures, thereby obtaining a wide operating temperature range. The oscillator implemented in a 180 nm CMOS process achieves a temperature coefficient of 40 ppm/°C from −40 to 170 °C at 0.65 V and a line sensitivity of 0.5 %/V from 0.65 to 2.4 V at room temperature, in simulation. Compared with state-of-the-art sub-$\mu\mathrm{W}$oscillators, this circuit obtains the highest operating temperature and the maximum temperature range.

This paper describes a miniature edge device that performs neural network inference with different exit options depending on available energy. In addition to the main-exit path, it provides an alternative, early-exit path that requires less computation and thus increase the number of inference operations for given energy. To compensate its degraded accuracy, the proposed device provides entropy as a confidence level for the early exit. The network is implemented with a custom low-power 180 nm CMOS processor chip and a 90 nm embedded flash memory chip and tested by images from CIFAR-10 dataset. The measurement results show the proposed neural network reduces processing time and thus energy consumption by 41.3% compared with the main-exit only method while sacrificing its accuracy from 69.5% to 66.0%.