Memristors have shown strong potential for constructing compact and efficient computing systems. The 1R memristor crossbar offers a regular structure capable of representing multi-level memory states through analog resistance variations. While sneak currents in nanoscale memristor crossbars are often considered a challenge for reliable memory operation, this work demonstrates that they can instead be harnessed to build nonlinear dynamical systems for computation. We first explore and analyze the behavior of sneak currents in 1R memristor crossbars under different input–ground configurations, showing how these currents can be exploited to form useful dynamic responses. We then propose an evolutionary algorithm that automatically determines the assignment of input and ground signals, optimizing both their positions and timing. This strategy allows circuit synthesis without auxiliary components, relying solely on the memristor crossbar. Finally, the evolved crossbar configurations are applied to multi-task time-series prediction, showing improved accuracy and efficiency over conventional approaches. The findings confirm the promise of 1R memristor crossbars as a compact and effective platform for nonlinear dynamical computation.

Abstract Obstructive Sleep Apnea (OSA) is a highly prevalent sleep disorder linked to considerable public health burdens and comorbidities. However, its heterogeneous presentation and the limited accessibility of traditional diagnostic tools such as polysomnography (PSG) lead to widespread underdiagnosis. As a result, artificial intelligence (AI) approaches, including machine learning (ML) and deep learning (DL) models, have attracted attention as an alternative pathway to detection. This paper first provides a comprehensive review of AI-driven OSA diagnosis, covering different diagnosis problems, input-data types, data biases, pre-processing techniques, and model performance. We then leverage the largest clinical dataset used in OSA prediction to date, approximately 110,000 patients with 22,000 having complete entries for all 50 features, to systematically compare the performance of 39 ML/DL models. Our findings highlight the challenging nature of OSA prediction, with accuracies ranging from 29.66% to 46.9% for 4-class prediction and 46.04% to 87.18% for binary tasks. DL models such as DANet and GATE scored highest, whereas ensemble approaches such as LGBM and AdaBoost displayed more consistent performance across folds. However, as severe cases of OSA are easier to predict and over-represented in datasets, accuracy alone is insufficient for model evaluation and we explore a variety of metrics. Finally, imbalance correction and feature selection improved weaker models, but had only marginal effects on the best-performing models. Looking forwards, the development of more sophisticated and tailored DL models and large, high-quality datasets may help to break current performance barriers. We hope that our work can attract more attention to this challenging but interesting research problem.

Reservoir computing offers a hardware-friendly machine learning approach that minimizes connectivity overhead and adapts well to various dynamic systems. However, traditional implementations suffer from limited computational capacity due to fading memory effects. This study introduces a novel memristive reservoir that exploits on the nonlinear properties of dynamic memristors and incorporates jumping memory to enhance its computational capabilities. By utilizing jumping memory technology, this model enhances the system’s ability to better handle time series tasks, effectively overcoming the memory capacity limitations of traditional memristive reservoir computing. Our experiments show that this approach demonstrates superior performance in system identification task and time series prediction tasks compared with the six SOTA approaches.

In light of the dynamic plasticity, nanosize, and energy efficiency of memristors, memristive reservoirs have attracted increasing attention in diverse fields of research recently. However, limited by deterministic hardware implementation, hardware reservoir adaptation is hard to realize. Existing evolutionary algorithms for evolving reservoirs are not designed for hardware implementation. They often ignore the circuit scalability and feasibility of the memristive reservoirs. In this work, based on the reconfigurable memristive units (RMUs), we first propose an evolvable memristive reservoir circuit that is capable of adaptive evolution for varying tasks, where the configuration signals of memristor are evolved directly avoiding the device variance of the memristors. Second, considering the feasibility and scalability of memristive circuits, we propose a scalable algorithm for evolving the proposed reconfigurable memristive reservoir circuit, where the reservoir circuit will not only be valid according to the circuit laws but also has the sparse topology, alleviating the scalability issue and ensuring the circuit feasibility during the evolution. Finally, we apply our proposed scalable algorithm to evolve the reconfigurable memristive reservoir circuits for a wave generation task, six prediction tasks, and one classification task. Through experiments, the feasibility and superiority of our proposed evolvable memristive reservoir circuit are demonstrated.

Brain-inspired computing takes inspiration from the brain to create energy-efficient hardware systems for information processing, capable of performing highly sophisticated tasks. Systems built with emerging electronics, such as memristive devices, can achieve gains in speed and energy by mimicking the distributed topology of the brain. In this work, a brain-inspired hardware architecture for evolutionary algorithms is proposed based on memristive arrays, which can realize sparse and approximate computing as a result of the parallel analog computing characteristic of the memristive arrays. On this basis, an efficient evolvable brain-inspired hardware system is implemented. We experimentally show that the approach can offer at least a four orders of magnitude speed improvement. We also use experimentally grounded simulations to explore fault tolerance and different parameter settings in the implemented hardware system. The experimental results show that the evolvable hardware system, implemented based on the proposed hardware architecture, can continuously evolve toward a better system even if there are failures or parameter changes in the memristive arrays, demonstrating that the proposed hardware architecture has good adaptability and fault tolerance.

Time Delay Reservoir (TDR) is a hardware-friendly machine learning approach from two perspectives. First, it can prevent the connection overhead of neural networks with increasing neurons. Second, through its dynamic system representation, TDR can also be implemented in hardware by different systems. However, it performs poorly on tasks that involve long-term dependency. In this work, we first introduce a higher-order delay unit, which is capable of accumulating and transferring the long history states in an adaptive manner to further enhance the reservoir memory. Particle Swarm Optimisation is applied to optimize the enhanced degree of memory adaptivity. Our experiments demonstrate its superiority both for short- and long-term memory datasets over seven existing approaches. In light of the hardware-friendly feature of TDR, we further propose a memristive implementation of our adaptive memory-enhanced TDR, where a dynamic memristor and the memristor-based delay element are applied to construct the reservoir. Through circuit simulation, the feasibility of our proposed memristive implementation is verified. The comparisons with different hardware reservoirs show that our proposed memristive implementation is effective both for short- and long-term memory datasets, while exhibiting benefits in terms of smaller circuit area and lower power consumption compared with traditional hardware reservoirs.

Traffic lights control could be regarded as a multi-agent coordinated problem. A model-free reinforcement learning (RL) approach is a powerful framework for solving such coordinated policy-making problems without prior environmental knowledge. In order to approach a global policy, communication among agents needs to be built. To enable dynamic and scalable communication, we propose a new RL model, CommNet based on Local Attention Mechanism (Attn-CommNet), which uses local selection and attention mechanism between hidden layers to facilitate cooperation. We evaluated the proposed method using synthetic and real word traffic flows under multi-scale road networks. The results demonstrate that the proposed method can get better performance in multi-scale problems, especially large-scale problems compared to the state-of-the-art methods.