Demo Data from EDBT 2026 / reviewers in the wild / expert
Jordi Cardona
dblp:228/2700
· DBLP profile ↗
4ranked-venue papers
4as first author
1since 2021 · last 2023
0000-0001-8184-3533ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Embedded and real-time systems · 62% Electronic design automation · 19% Interconnection networks and networks-on-chip · 19% |
Topics — the 5 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip › routing algorithms
deterministic routing |
0.3 | 1 | 2018 | EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Electronic design automation › physical design
routing |
0.3 | 1 | 2018 | EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Embedded and real-time systems
worst-case execution time analysis |
0.3 | 1 | 2018 | EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Embedded and real-time systems › real-time scheduling › worst-case analysis
worst-case execution time estimation |
0.3 | 1 | 2018 | EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 |
Embedded and real-time systems › real-time analysis
worst-case timing analysis |
0.1 | 1 | 2018 | NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores · RTSS 2018 |
Methods — techniques the papers use, named apart from their topics
weighted mesh · 0.3weight allocation · 0.3stochastic optimization · 0.3integer linear programming · 0.3even/odd routing · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | Accurately Measuring Contention in Mesh NoCs in Time-Sensitive Embedded SystemsabstractThe computing capacity demanded by embedded systems is on the rise as software implements more functionalities, ranging from best-effort entertainment functions to performance-guaranteed safety-related functions. Heterogeneous manycore processors, using wormhole mesh (wmesh) Network-on-Chips (NoCs) as the main communication means, and contention block among applications, are increasingly considered to deliver the required computing performance. Most research efforts on software timing analysis have focused on deriving bounds (estimates) to the contention that tasks can suffer when accessing wmesh NoCs. However, less effort has been devoted to an equally important problem, namely,accuratelymeasuring the actual contention tasks generate each other on the wmesh which is instrumental during system validation to diagnose any software timing misbehavior and determine which tasks are particularly affected by contention on specific wmesh routers. In this article, we work on the foundations ofcontention measuringin wmesh NoCs and propose and explain the rationale of agolden metric, called taskPairWise Contention(PWC). PWC allows ascribing the actual share of the contention a given task suffers in the wmesh to each of its co-runner tasks at packet level. We also introduce and formalize aGolden Reference Value(GRV) for PWC that specifically defines a criterion to fairly break down the contention suffered by a task among its co-runner tasks in the wmesh. Our evaluation shows that GRV effectively captures how contention occurs by identifying the actual core (task) causing contention and whether contention is caused by local or remote interference in the wmesh. Jordi Cardona, Carles Hernández 0001, Jaume Abella 0001, Enrico Mezzetti, Francisco J. Cazorla |
ACM Trans. Design Autom. Electr. Syst. | 1 |
| 2019 | Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time EnforcementabstractIn real-time systems, the techniques to derive bounds to the contention tasks can suffer in multicore build on resource quota monitoring and enforcement. Existing techniques track and bound the number of requests to hardware shared resources that each core (task) is allowed to perform. In this paper we show that current software-only solutions work well when there is a single resource and type of request to track and bound, but do not scale to the more general case of several shared resources that accept different request types, each with a different associated latency. To handle this (more general) case, we propose low-overhead hardware support called Maximum-Contention Control Unit (MCCU). The MCCU performs fine-grain tracking of different types of requests, preventing a core to cause more interference on its contenders than budgeted. In this process, the MCCU also helps verifying that individual requests duration does not exceed their theoretical bounds, hence dealing with scenarios in which requests can have an arbitrarily large duration. Jordi Cardona, Carles Hernández 0001, Jaume Abella 0001, Francisco J. Cazorla |
DATE | 1 |
| 2018 | NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time ManycoresabstractManycores are capable of providing the computational demands required by functionally-advanced critical applications in domains such as automotive and avionics. In manycores a network-on-chip (NoC) provides access to shared caches and memories and hence concentrates most of the contention that tasks suffer, with effects on the worst-case contention delay (WCD) of packets and tasks' WCET. While several proposals minimize the impact of individual NoC parameters on WCD, e.g. mapping and routing, there are strong dependences among these NoC parameters. Hence, finding the optimal NoC configurations requires optimizing all parameters simultaneously, which represents a multidimensional optimization problem. In this paper we propose NoCo, a novel approach that combines ILP and stochastic optimization to find NoC configurations in terms of packet routing, application mapping, and arbitration weight allocation. Our results show that NoCo improves other techniques that optimize a subset of NoC parameters. Jordi Cardona, Carles Hernández 0001, Enrico Mezzetti, Jaume Abella 0001, Francisco J. Cazorla |
RTSS | 1 |
| 2018 | EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time SystemsabstractThe increasing performance needs in critical real-time embedded systems (CRTESs) can only be satisfied with the use of high-performance manycore processors. While NoC-based manycore systems are popular in the high-performance domain due to their high average performance, they challenge deriving tight worst-case execution time (WCET) estimates, as needed in CRTES. Weighted meshes have been proposed to alleviate NoCs pathological behavior-caused by large bandwidth imbalance-by making locally unbalanced arbitration decisions to reach globally balanced bandwidth. In this paper, we show that existing weighted mesh solutions do not completely remove unwanted imbalance, in particular for nodes subject to high congestion. We propose even/odd mesh (EOmesh), an approach that combines heterogeneous predictable routing and weight allocations that delivers near-optimal bandwidth allocation across cores without increasing NoC complexity. EOmesh, which can be implemented either by hardware means or by software means on top of regular weighted meshes, improves the average performance and WCET results of the reference weighted mesh design. Jordi Cardona, Carles Hernández 0001, Jaume Abella 0001, Francisco J. Cazorla |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |