The selection of a suitable photovoltaic (PV) design for emerging energy harvesting applications remains challenging, as PV cell performance is highly dependent on design variables and environmental setup. These factors vary widely across existing studies, making direct comparisons complex and increasing uncertainty in predicting expected PV cell output characteristics for a given use case. To address this, our paper presents a comparison of various on-chip PV cell configurations, implemented using a 0.6mm x 0.6mm test chip realized in 65nm deep-nwell (DNW) CMOS technology. The experimental results demonstrate that, depending on diode arrangements, separate configurations achieve a maximum open-circuit voltage of 0.54V and a peak power density of 1.18 µW/mm2at 20 klux illumination. This characterization work, therefore, enables designers to select an optimal configuration tailored to specific application scenarios.

This paper presents a 0.36-mm2I2C-to-SPI converter chip with on-the-fly conversion for E-textile applications. The on-the-fly operation eliminates the need for on-chip data buffers and clock generation, improving the area and power efficiency versus prior works. The die area is 7.33× smaller than commercially-available off-the-shelf (COTS) I2Cto-SPI converters, enabling it to integrate unobtrusively into E-textile applications. The chip supports conversion at ultra-fast I2C operating frequency up to 5 MHz while consuming only 0.379 mW of power. At the standard I2C speed of 400 kHz, it consumes 0.145 mW, which is 48× more power-efficient than commercially available I2C-to-SPI converters.

Photoplethysmography (PPG) is a widely adopted technique for monitoring essential physiological parameters like heart rate and blood oxygen saturation (SpO2). The increasing demand for wearable health monitoring devices necessitates the development of energy-efficient PPG systems. This paper proposes an ultra-low power, end-to-end PPG sensing system with continuous monitoring capabilities. The system consists of three distinct chips: a system-on-chip, an analog-front end chip, and a Bluetooth low-energy transmitter, enabling real-time PPG data transmission to a smartphone. All components are fabricated using the bulk 65 nm low-power CMOS process. This system achieves minimal power consumption of 18.78 µW during idle periods and 148.5 µW during active data transmission when aggressively duty-cycled at 2.4%.

This paper presents a 0.36-mm2I2C-to-SPI converter chip designed for electronic textile (E-textile) applications, featuring an on-the-fly conversion scheme that eliminates the need for on-chip data buffers and internal clock generation. By leveraging the synchronous nature of both I2C and SPI protocols, the proposed design forwards each incoming I2C data bit, SDA (Serial Data Line) directly to the SPI output using the I2C serial clock line (SCL), thereby reducing both area and power consumption. Two versions of the chip are proposed: a ‘full’ die and a ‘compact’ die. The converter enables seamless integration into distributed in-textile architectures by minimizing silicon overhead. The ‘full’ die implementation achieves a$7.33\times $area reduction compared to commercially available I2C-to-SPI converters, while the ‘compact’ version further reduces the footprint by$14.73\times $through the use of a small corner seal-ring and a linear pad ring layout. Measurement results confirm robust operation at ultra-fast I2C frequency (5 MHz), consuming only 0.379 mW for the ‘full’ die and 0.333 mW for the ‘compact’ variant. At standard I2C speeds (400 kHz), the converter demonstrates a$48\times $improvement (‘full’ die) in power efficiency over commercial off-the-shelf (COTS) solutions, making it an effective and unobtrusive solution for next-generation E-textile systems.

This article presents modeling and design optimization of switched-capacitor charge pumps for use as cold-start circuits in photovoltaic energy harvesters. For a successful cold-start from photovoltaic energy, a certain output voltage and current must be generated by the charge pump while jointly minimizing the required input voltage and current from the energy harvesting source. We model the operation of the cold-start charge pump including its oscillator, derive expressions for required input voltage and current based on output requirements, and demonstrate a Pareto-optimal design space that defines the tradeoff between the required input voltage and current to achieve cold-start. We then assess the impacts of process and temperature variation, and suggest a general design methodology for cold-start charge pump circuits. Finally, we validate models with measurements from a design fabricated in 55nm CMOS.

Graph coloring is a NP-hard problem, and computing the solution on a digital computer entails an exponential increase in the computing resources (time, memory) with increasing problem size. This has motivated the search for alternate and more efficient non-Boolean approaches. Here, we experimentally demonstrate the solution to this problem using the phase dynamics of coupled oscillators. Using a 30-oscillator IC platform with reconfigurable all-to-all coupling and minimal post-processing, our approach achieves 98% accuracy in detecting (near-) optimal solutions within 1 color of the optimal solution in comparison to the 77% accuracy achieved with the heuristic Johnson algorithm. Additionally, we propose a new local search-based post-processing scheme to improve the quality of the coloring solution. Finally, using circuit simulations, we demonstrate the scalability and speed up (~ 100×) achievable with the above approach in larger graphs.