This paper proposes an accelerometer readout integrated circuit (IC) that supports micro-electromechanical systems (MEMS) piezoresistive accelerometers designed for ultrahigh-G measurements. The IC utilizes an adaptive gain path and shock detector to address circuit saturation and settling issues when shock signals are injected. This enables the use of a capacitive coupling structure that mitigates the offsets resulted from sensor mismatches. Additionally, the capacitive coupling allows to employ different supply voltages for the MEMS sensor and the IC. Thus, the IC can use a much lower supply voltage for low power consumption while the MEMS sensor can use a high supply voltage for better output sensitivity. By bypassing a gain stage for lower overall channel gain during the shock signals, the system can ensure the acquisition of accurate signal immediately after the shock signal. The IC was fabricated in 180nm CMOS technology, consuming 1.02 mW from a 1.8V supply voltage. Measurement results show a 85% and 89% enhancement in the common-mode offset and a gain error for a 1-ms shock signal when the proposed adaptive gain is used. The IC with a MEMS piezoresistive accelerometer is also validated by a 50 kG shock survival test.

The measurement of small variation of the bioZ having a substantially large baseline impedance is a great challenge, requiring a wide dynamic range (DR) and a high signal-to-noise ratio (SNR). This paper presents a new impedance measurement architecture based on Δ-ΔΣ modulator with capacitive-feedback baseline cancellation. The readout front-end (RFE) of the integrated circuit (IC) is configured with a first-order Δ-ΔΣ modulator and a feedback capacitive digital-to-analog converter (CDAC) that minimize the power consumption. The front-stage Δ-modulation allows to achieve a wide input DR of 30 kΩ by eliminating the large static baseline impedance with no static current consumption. It also mitigates the input-dependent noise characteristic of the current balancing instrumentation amplifier (CBIA) significantly. The current generator (CG) generates a square wave for the excitation current with a current magnitude ranging from 5 μApkto 100 μApkover a frequency range from 1 kHz to 1024 kHz. The chopping and dynamic element matching (DEM) techniques are adopted in the bandgap reference (BGR), CG, and current-DAC (IDAC) to mitigate their flicker noises, which dominate the signal bandwidth (<10 Hz). The proposed IC designed in a 180-nm CMOS process consumes only 7.64 μW for the I path of the RFE, achieving a maximum SNR of 97.7 dB.

This paper presents a high-throughput impedance readout IC with a novel synchronous cyclic integration technique using a scalable capacitive transimpedance stage. The proposed technique removes the need for the low pass filter (LPF) in the readout chain and performs the I/Q demodulation within a single cycle. Fabricated in a 180-nm CMOS process, the proposed IC consumes 50 μW from a 1.2-V supply. It can measure impedances over a frequency of 100 Hz to 100 kHz with an accuracy of 99.7% and can achieve a throughput of 50 kSps at 100 kHz input frequency.

This paper presents a novel high-throughput impedance measurement integrated circuit (IC) with baseline cancellation for neural EIT applications. The proposed technique uses a peak detector to obtain impedance magnitude every cycle. After taking the peak, the peak detector is reset to a DC baseline voltage. And, the signal swinging between the amplitude and the reset baseline is further amplified, allowing to measure small impedance variations even with a large baseline. The proposed IC fabricated in a 180-nm standard CMOS process can measure impedance variations of >0.1% baseline can be measured, while achieving high throughput of 100 kS/s at 100 kHz input frequency. Scalable design allows the proposed IC to support a wide frequency range from 100 Hz to 100 kHz with a power consumption from 31 μW to 39 μW from a 1.2-V supply.

This paper presents an impedance-measurement integrated circuit (IC) that extends the input frequency range to 10 MHz at low power consumption. The proposed IC directly measures the magnitude and phase of the target impedance while adopting a reference resistor, which is connected in series with the target impedance, to obviate the nonideal delays that may be introduced by the voltage-controlled current source and the receiver's signal processing paths. On the receiver side of the IC, a frequency shift is performed by a chopper in front of the first-stage instrumentation amplifier (IA). The chopper down- converts the frequency of the incoming signal, which ranges to 10 MHz, to a common intermediate frequency of 10 kHz. As a result, the requirements on the IA bandwidth and the comparator delay are greatly relaxed, leading to a significant power saving. Furthermore, this technique improves the phase accuracy because the time interval corresponding to the phase at a high frequency increases at the down-converted frequency. Finally, the auto-zeroing technique is used to cancel out the comparator offset, thus reducing the magnitude and phase errors. The proposed IC designed in a 180-nm CMOS process consumes only 544 μW for a frequency range from 100 Hz to 10 MHz with the maximum magnitude and phase errors of 1.0% and 1.8°, respectively.

This paper presents a galvanic coupling communication (GCC) receiver for bionic arms. The detachability of the bionic arms results in various changes such as contact impedance variation and electrode misalignment. Its dynamic usage conditions may lead to contact with metallic objects. Moreover, the GCC has an inherent drawback of narrow channel bandwidth, which limits the communication speed. In this work, we demonstrate that the GCC can offer robust operation under varying channel conditions by using HFSS simulations. In addition, by applying a cascaded continuous-time linear equalizer, the proposed receiver widens the bandwidth from 1 MHz to 60 MHz. Implemented in 0.18-um CMOS process, a 30-Mbps GCC receiver operates successfully for bionic arms with robustness against channel condition variations while following body safety guidelines and consuming 650 uW.