The conventional power network design process requires iterative modifications to the existing power network to eliminate hot spots and to converge to target impedance parameters. At later stages in the IC design process, this procedure may require significant time and human resources due to the limited flexibility to accommodate necessary changes. Power delivery exploration during early stages of the design process may bring considerable savings to the system development effort. The number of iterations may be greatly reduced by choosing the initial parameters sufficiently close to the optimum. This paper presents a power delivery exploration framework based on constrained global optimization. The power network parameters are estimated at early stages of the development process, while considering both electrical and nonelectrical factors, such as area and cost. A Laplace transform-based circuit simulator is described that is well suited for optimization purposes due to the high computational efficiency when a large number of iterations is required. The proposed framework has been applied to the distribution of voltage domains in a large scale complex integrated system, while minimizing the cost of the decoupling capacitor placement. The optimal number of voltage rails are determined, demonstrating an approximately 40% lower on-chip area than alternative solutions.

Over the past decades, aggressive voltage scaling combined with increased power demands has placed stringent requirements on on-chip power quality. Unwanted voltage fluctuations and droops may cause a variety of issues, ranging from glitch power to device malfunction. If revealed at the later stages of the design process, mitigation techniques may become unbearably costly in both time and money. A framework for exploratory power delivery optimization is described to enhance the power delivery network during early stages of the design process in accordance with design specifications. The power delivery design process is converted into a constrained minimization problem, consisting of design metrics combined into objective and constraint functions. The framework supports the optimization of the power network characteristics while considering external, non-electrical design specifications, such as cost and area, providing a comprehensive network analysis capability. In one case study, a 15% reduction in decoupling capacitor placement along with a 38.6% reduction in power consumption is achieved while satisfying performance and power quality constraints.