Jiyi Liu

dblp:228/9207 · DBLP profile ↗
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5ranked-venue papers
0as first author
4since 2021 · last 2026
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 since 2021Artificial intelligence and machine learning · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
YearPublicationVenuePosition
2026 On the Purpose of Harmonic Suppression: A Two-stage Approach Enabling ACPR Enhancement for VMbPWM-based All-Digital Transmitter
Yujie Xian, Jiyi Liu, Kaijiang Li, Shang Ma
ISCAS2
2026 A Complexity Reduced VMbPWM-Based All-Digital Transmitter With Multi-Bit Deduction Toward Higher In-Band SNR
abstract
By utilizing the mapping-based pulse width modulation (MPWM), the look-up-table (LUT) based all digital transmitter (ADT) features a superb in-band signal-to-noise ratio (SNR), but its rather high random-access memory (RAM) consumption and the computation complexity hinder its further usage in applications requiring real-time reconfigurability. Our previous work leverages a Viterbi-based PWM (VbPWM) scheme to provide an iterative deduction approach, but the degraded performance and the excessive register usage make it unsuitable for real applications. By exploring the quais-periodicity inside the differenced target function, a Viterbi-based multi-bit deduction PWM (VMbPWM) is proposed in this paper, which leverages the periodic-like feature of the target function to form a multiple-bit deduction process of the 1-bit pulse sequence. Numerical simulations suggest that the proposed scheme outperforms the MPWM by a maximum of 19 dB in in-band SNR when deducing 8 bits in a single iteration, and a maximum of 10 dB increase in SNR is presented for the VMbPWM over VbPWM when the two possess the same computation complexity. After combining iterations that deduce different amounts of bits, the computation complexity of VMbPWM can be reduced to nearly 1/4 of that when deducing 8 bits in each iteration at the cost of a 5 dB SNR degradation. Accordingly, a fully pipelined ADT structure is conducted based on the VMbPWM and is implemented with the ZCU102 evaluation kit. As depicted by the implementation results, the proposed VMbPWM-based ADT reduces the RAM usage to two tiles while eliminating the register usage from 22% using VbPWM to 15% using VMbPWM. Moreover, a reduced error vector magnitude (EVM) is demonstrated for the VMbPWM, where the maximum EVM turns out to be 2.6%, 4.0%, and 4.9% under the symbol rate of 5 MBaud, 25 MBaud, and 50 MBaud using 64QAM, which is typically 0.1%-0.2% lower than the VbPWM.
Yujie Xian, Kaijiang Li, Jiyi Liu, Shang Ma
IEEE Trans. Circuits Syst. I Regul. Pap.4
2024 A DEM Structure Based on Random Combination Group Encoding toward a Reduced Circuit Area
Yujie Xian, Jiyi Liu, Shang Ma, Runsen Yan, Mengtao Yang
ISCAS2
2022 Security Evaluation of Smart Contracts based on Code and Transaction - A Survey
abstract
As a computer program running on top of blockchain, smart contract not only proliferates the diversity of applications but also brings a myriad of security issues that lead to huge financial losses. As a result, security evaluation of smart contracts, such as vulnerability identification and attack detection, has received extensive attention in recent years. Given that various types of approaches have been proposed for smart contract security analysis, a systematization of knowledge for this domain is needed. To this end, in this paper, we systematically review the related literature in recent years and describe the mainstream approaches to the security evaluation of smart contracts. Specifically, we classify state-of-the-art analysis techniques for smart contract analysis into two categories, namely, code-based approaches and transaction-based approaches. Further, we elaborate on the key techniques adopted by these works respectively. We highlight and summarize the key challenges in future research for smart contract security analysis. Our research provides a more in-depth understanding of the state-of-the-art works for securing smart contracts, which may shed light on future research in this area.
Jianzhong Su, Jiyi Liu, Yuhong Nan
ICSS2
2019 Robust estimation via Generative Adversarial Networks
Jiyi Liu, Weizhi Zhu
ICLR (Poster)2