Abstract This paper demonstrates how to use a satisfiability modulo theories (SMT) solver together with a bounded model checker to verify properties of real-time physical layer protocols. The method is first used to verify the Biphase Mark protocol, a protocol that has been verified numerous times previously, allowing for a comparison of results. The techniques are extended to the 8N1 protocol used in universal asynchronous receiver transmitters. We then demonstrate the use of temporal refinement to link a finite state specification of 8N1 with its real-time implementation. This refinement relationship relieves a significant disadvantage of SMT approaches—their inability to scale to large problems. Finally, capturing the impact of metastability on timing requirements is a key issue in modeling physical-layer protocols. Rather than model metastability directly, a contribution of our models is treating its effect as a constraint on non-determinism.

We present by example a new application domain for functional languages: emulators for embedded real-time protocols. As a case-study, we implement a simple emulator for the Biphase Mark Protocol, a physical-layer network protocol in Haskell. The surprising result is that a pure functional language with no built-in notion of time is extremely well-suited for constructing such emulators. Furthermore, we use Haskell's property-checker QuickCheck to automatically generate real-time parameters for simulation. We also describe a novel use of QuickCheck as a "probability calculator" for reliability analysis.

This paper demonstrates how to use a satisfiability modulo theories (SMT) solver together with a bounded model checker to prove temporal refinement conditions. The method is demonstrated by refining a specification of the 8N1 protocol, a widely-used protocol for serial data transmission. A nondeterministic finite-state 8N1 specification is refined to an infinite-state implementation in which in- terleavings are constrained by real-time linear inequalities. The refinement proof is via automated induction proofs over infinite-state transitions systems using SMT and model checking, as implemented in SRI International's Symbolic Analysis Laboratory (SAL).

This paper examines cache consistency conditions for multiprocessor shared memory systems. It states and motivates a weaker condition than is normally implemented. An algorithm is presented that exploits the weaker condition to achieve greater concurrency. The algorithm is shown to satisfy the weak consistency condition. Other properties of the algorithm and possible extensions are discussed.

A window protocol based on the block acknowledgment method, in which acknowledgment message has two numbers, m and n, to acknowledge the reception of all data messages with sequence numbers ranging from m to n, is discussed. In the window protocol, message sequence numbers are taken from a finite domain and both message disorder and loss can be tolerated. An initial version of the protocol that uses a simplified timeout action and unbounded sequence numbers is presented, the simplified timeout action in the protocol is replaced by a sophisticated one without disturbing the protocol's correctness, and the unbounded sequence numbers are replaced by bounded ones while preserving the protocol's correctness. Remarks concerning other variations of the protocol are also presented.>

We describe a new version of the window protocol where message sequence numbers are taken from a finite domain and where both message disorder and loss can be tolerated. Most existing window protocols achieve only one of these two goals. Our protocol is based on a new method of acknowledgement, called block acknowledgement, where each acknowledgement message has two numbers m and n to acknowledge the reception of all data messages with sequence numbers ranging from m to n. Using this method of acknowledgement, the proposed protocol achieves the two goals while maintaining the same data transmission capability of the traditional window protocol.

This paper examines cache consistency conditions (safety conditions) for multiprocessor shared memory systems.It states and motivates a weaker condition than is normally required.An algorithm is presented that exploits the weaker condition to achieve greater concurrency.The paper concludes with a proof that the algorithm satisfies the safety condition.

The alternating-bit protocol is a fundamental protocol for transmitting data across an unreliable transmission medium. The reliability of the protocol depends on its initial state. The authors present a self-stabilizing version of the alternating-bit protocol, i.e. the system converges to a state that guarantees reliable data transmission regardless of its initial state. Applications of the protocol and possible extensions are discussed.>

Presents a novel class of mutual exclusion systems, in which processes circulate one token, and each process enters its critical section when it receives the token. Each system in the class is self-stabilizing; i.e. it it starts at any state, possibly one where many tokens exist in the system, it is guaranteed to converge to a good state where exactly one token exists in the system. The systems are better than previous systems in that their state transitions are noninterfering; i.e., if any state transition is enabled at any instant, then it will continue to be enabled until it is executed. This makes the systems easier to implement as delay-insensitive circuits.>