Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data.

Tsu-Huei Thai

dblp:23/5928 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 30% High-performance computing · 30% Reconfigurable computing and FPGAs · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs › coarse-grained reconfigurable architecture
loop mapping
0.011991
Partitioning and Mapping Nested Loops on Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 1991
Parallel and multicore computing › loop transformation
loop parallelization
0.011991
Partitioning and Mapping Nested Loops on Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 1991
High-performance computing › distributed memory systems
message passing multiprocessor
0.011991
Partitioning and Mapping Nested Loops on Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 1991
Distributed systems › communication optimization
communication overhead reduction
0.011991
Partitioning and Mapping Nested Loops on Multiprocessor Systems · IEEE Trans. Parallel Distributed Syst. 1991

Methods — techniques the papers use, named apart from their topics

hyperplane method · 0.0heuristic mapping algorithm · 0.0
YearPublicationVenuePosition
1991 Partitioning and Mapping Nested Loops on Multiprocessor Systems
abstract
A method for executing nested loops with constant loop-carried dependencies in parallel on message-passing multiprocessor systems to reduce communication overhead is presented. In the partitioning phase, the nested loop is divided into blocks that reduce the interblock communication, without regard to the machine topology. The execution ordering of the iterations is defined by a given time function based on L. Lamport's (1974) hyperplane method. The iterations are then partitioned into blocks so that the execution ordering is not disturbed, and the amount of interblock communication is minimized. In the mapping phase, the partitioned blocks are mapped onto a fixed-size multiprocessor system in such a manner that the blocks that have to exchange data frequently are allocated to the same processor or neighboring processors. A heuristic mapping algorithm for hypercube machines is proposed.>
Jang-Ping Sheu, Tsu-Huei Thai
IEEE Trans. Parallel Distributed Syst.2