Demo Data from EDBT 2026 / reviewers in the wild / expert
S. Y. Wong
dblp:23/823
· DBLP profile ↗
4ranked-venue papers
1as first author
0since 2021 · last 2011
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-authorArtificial intelligence and machine learning · 1Graphics, computer vision, multimedia, augmented reality and games · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Geometric modeling and processing · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 39% Storage systems · 30% Memory systems · 30% |
Topics — the 5 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Geometric modeling and processing
curve fitting |
0.0 | 1 | 1996 | An optimization approach for biarc curve-fitting of B-spline curves · Comput. Aided Des. 1996 |
Geometric modeling and processing › shape modeling › parametric modeling › spline curves
b-spline curves |
0.0 | 1 | 1996 | An optimization approach for biarc curve-fitting of B-spline curves · Comput. Aided Des. 1996 |
Processor architecture and microarchitecture › arithmetic unit
arithmetic logic unit |
0.0 | 1 | 1955 | Fast Carry Logic for Digital Computers · IRE Trans. Electron. Comput. 1955 |
Storage systems › storage device technology
high-density storage |
0.0 | 1 | 1955 | High Density Williams Storage · IRE Trans. Electron. Comput. 1955 |
Processor architecture and microarchitecture › computer arithmetic
binary addition |
0.0 | 1 | 1955 | Fast Carry Logic for Digital Computers · IRE Trans. Electron. Comput. 1955 |
Methods — techniques the papers use, named apart from their topics
optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2011 | A neural network-based approach of quantifying relative importance among various determinants toward organizational innovation
T. C. Wong 0001, S. Y. Wong, Kwai-Sang Chin |
Expert Syst. Appl. | 2 |
| 1996 | An optimization approach for biarc curve-fitting of B-spline curves
J. C. Ong, S. Y. Wong, T. H. Loh, G. X. Hong |
Comput. Aided Des. | 2 |
| 1955 | Fast Carry Logic for Digital ComputersabstractExisting large scale binary computers typically must allow for the maximum full length carry time in each addition. It has been shown that average carry sequences are significantly shorter than this maximum, on the average only five stages for a 40 digit addition. A method is described to realize the implied 8 to 1 time saving by deriving an actual ``carry completion'' signal. Experimental results verify this saving. Bruce Gilchrist, James H. Pomerene, S. Y. Wong |
IRE Trans. Electron. Comput. | 3 |
| 1955 | High Density Williams StorageabstractIn this study, an investigation was made to discover methods of storing more bits on a Williams tube than can be stored by conventional methods. Read-around was ignored because the object was to explore the Williams tube as a secondary memory for non-random access operations. Proceeding on this basis, it was found that a four-fold increase in packing is possible with established techniques, and an even greater increase with other methods described in this paper. Such a memory is more versatile than a magnetic drum, as shown by the example of machine organization presented in this paper. S. Y. Wong |
IRE Trans. Electron. Comput. | 1 |