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Peichen Xie

dblp:230/8387 · DBLP profile ↗
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6ranked-venue papers
3as first author
4since 2021 · last 2025
0009-0001-7144-4069ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 1 since 2021Computer networks · 2 · 2 since 2021Artificial intelligence and machine learning · 1 · 1 first-authorDatabases, data management, data science and information retrieval · 1 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
GPUs and heterogeneous computing · 57% Processor architecture and microarchitecture · 25% Memory systems · 10%
Theoretical computer science
2 papers
Graph algorithms and graph theory · 100%
Network and information security
2 papers
Privacy and data protection · 33% Hardware security and side channels · 29% Cryptographic protocols and secure computation · 29%

Topics — the 11 heaviest of 12, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing
GPU graph processing
1.322023
Path Merging Based Betweenness Centrality Algorithm in Delay Tolerant Networks · IEEE J. Sel. Areas Commun. 2023
Galliot: Path Merging Based Betweenness Centrality Algorithm on GPU · INFOCOM 2023
Graph algorithms and graph theory › centrality
betweenness centrality
1.322023
Path Merging Based Betweenness Centrality Algorithm in Delay Tolerant Networks · IEEE J. Sel. Areas Commun. 2023
Galliot: Path Merging Based Betweenness Centrality Algorithm on GPU · INFOCOM 2023
Processor architecture and microarchitecture › computer arithmetic
floating-point arithmetic
0.912025
Revealing Floating-Point Accumulation Orders in Software/Hardware Implementations · USENIX ATC 2025
GPUs and heterogeneous computing
GPU computing
0.712023
Path Merging Based Betweenness Centrality Algorithm in Delay Tolerant Networks · IEEE J. Sel. Areas Commun. 2023
Graph algorithms and graph theory
centrality
0.712023
Galliot: Path Merging Based Betweenness Centrality Algorithm on GPU · INFOCOM 2023
Privacy and data protection
privacy-preserving computation
0.412019
BAYHENN: Combining Bayesian Deep Learning and Homomorphic Encryption for Secure DNN Inference · IJCAI 2019
Hardware security and side channels › side-channel countermeasures
memory access pattern protection
0.312018
Shadow Block: Accelerating ORAM Accesses with Data Duplication · MICRO 2018
Cryptographic protocols and secure computation › oblivious data structures
oblivious random access machine
0.312018
Shadow Block: Accelerating ORAM Accesses with Data Duplication · MICRO 2018
Memory systems
oblivious RAM
0.312018
Shadow Block: Accelerating ORAM Accesses with Data Duplication · MICRO 2018
Internet of things and sensor networks
delay tolerant networks
0.212023
Path Merging Based Betweenness Centrality Algorithm in Delay Tolerant Networks · IEEE J. Sel. Areas Commun. 2023
Cryptographic primitives and cryptanalysis
homomorphic encryption
0.112019
BAYHENN: Combining Bayesian Deep Learning and Homomorphic Encryption for Secure DNN Inference · IJCAI 2019

Methods — techniques the papers use, named apart from their topics

path merging · 3.3locality-oriented policy · 2.0shadow blocks · 0.7data duplication · 0.7ORAM space partitioning · 0.7homomorphic encryption · 0.4bayesian neural network · 0.4
YearPublicationVenuePosition
2025 GPU Architectures in Graph Analytics: A Comparative Experimental Study
Peichen Xie, Zhigao Zheng 0001, Yongluan Zhou, Yang Xiu, Bo Du 0001
EDBT1
2025 Revealing Floating-Point Accumulation Orders in Software/Hardware Implementations
Peichen Xie, Yanjie Gao, Jilong Xue
USENIX ATC1
2023 Galliot: Path Merging Based Betweenness Centrality Algorithm on GPU
Zhigao Zheng 0001, Chen Zhao 0019, Peichen Xie, Bo Du 0001
INFOCOM3
2023 Path Merging Based Betweenness Centrality Algorithm in Delay Tolerant Networks
abstract
Delay Tolerant Network (DTN) is a widely used network in computer network and wireless network, there are no permanent end-to-end connections between source and destination nodes (vertices). Betweenness centrality (BC) is used to find the key nodes (vertices) of DTNs, and there are kinds of implementations of the BC algorithm for DTNs. However, most recent algorithms in BC computation suffer from the problem of high auxiliary memory consumption. To reduce BC computing’s memory consumption, we propose a path-merging-based algorithm called Galliot to calculate the BC values using GPU, which aims to minimize the on-board memory consumption and enable the BC computation of large-scale graphs on GPU. The proposed algorithm requires$\mathcal {O}(n)$space and runs in$\mathcal {O}(mn)$time on unweighted graphs. We present the theoretical principle for the proposed path merging method. Moreover, we propose a locality-oriented policy to maintain and update the worklist to improve GPU data locality. In addition, we conducted extensive experiments on NVIDIA GPUs to show the performance of Galliot. The results show that Galliot can process the larger graphs, which have$11.32\times $more vertices and$5.67\times $more edges than the graphs that recent works can process. Moreover, Galliot can achieve up to$38.77\times $speedup over the existing methods.
Zhigao Zheng 0001, Bo Du 0001, Chen Zhao 0019, Peichen Xie
IEEE J. Sel. Areas Commun.4
2019 BAYHENN: Combining Bayesian Deep Learning and Homomorphic Encryption for Secure DNN Inference
abstract
Recently, deep learning as a service (DLaaS) has emerged as a promising way to facilitate the employment of deep neural networks (DNNs) for various purposes. However, using DLaaS also causes potential privacy leakage from both clients and cloud servers. This privacy issue has fueled the research interests on the privacy-preserving inference of DNN models in the cloud service. In this paper, we present a practical solution named BAYHENN for secure DNN inference. It can protect both the client's privacy and server's privacy at the same time. The key strategy of our solution is to combine homomorphic encryption and Bayesian neural networks. Specifically, we use homomorphic encryption to protect a client's raw data and use Bayesian neural networks to protect the DNN weights in a cloud server. To verify the effectiveness of our solution, we conduct experiments on MNIST and a real-life clinical dataset. Our solution achieves consistent latency decreases on both tasks. In particular, our method can outperform the best existing method (GAZELLE) by about 5x, in terms of end-to-end latency.
Peichen Xie, Bingzhe Wu, Guangyu Sun 0003
IJCAI1
2018 Shadow Block: Accelerating ORAM Accesses with Data Duplication
abstract
Oblivious RAM (ORAM) is a cryptographic primitive designed to hide memory access patterns. To achieve this objective, the intended data block is loaded and evicted back together with other data blocks and dummy blocks in each ORAM access. To further protect the timing pattern, extra dummy ORAM accesses are triggered periodically. Such designs lead to huge memory access overheads. Many techniques have been proposed to mitigate this problem by reducing the total number of ORAM accesses and the number of blocks per access. However, the impact of the access order of intended data block in an ORAM access is not addressed yet. In this work, we argue that higher performance can be achieved by advancing the access to the intended data block in ORAM accesses. However, changing the access order of blocks directly compromises the ORAM security. To solve this problem, we propose a duplication method to advance the access to the intended data blocks without compromising the ORAM security. The method leverages dummy blocks to store extra copies of data blocks, to facilitate early access of intended data blocks. These dummy blocks with valid data duplications are called Shadow blocks in this work. We further introduce two data duplication techniques, called RD-Dup and HD-Dup, to reorder the data block access for different purposes. In addition, we propose ORAM space partitioning to make RD-Dup and HD-Dup cooperate with each other efficiently. Compared with state-of-the-art ORAMs, our design can achieve a 32% reduction in system execution time on average, with negligible hardware overheads.
Xian Zhang 0001, Guangyu Sun 0003, Peichen Xie, Chao Zhang 0007, Yannan Liu, Lingxiao Wei, Qiang Xu 0001, Chun Jason Xue
MICRO3