Demo Data from EDBT 2026 / reviewers in the wild / expert
Shamit Bansal
dblp:233/0585
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 2018
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems
real-time scheduling |
0.3 | 1 | 2018 | Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling · RTSS 2018 |
Embedded and real-time systems › real-time software
real-time software synthesis |
0.3 | 1 | 2018 | Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling · RTSS 2018 |
Embedded and real-time systems
semantics-preserving implementation |
0.3 | 1 | 2018 | Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling · RTSS 2018 |
Methods — techniques the papers use, named apart from their topics
integer linear programming · 0.3abstraction layer for timing analysis · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority SchedulingabstractModel-based design using the Simulink modeling formalism and associated toolchain has gained popularity in the development of real-time embedded systems. However, the current research on software synthesis for Simulink models has a critical gap for providing a deterministic, semantics-preserving implementation on multicore architectures with partitioned fixed-priority scheduling. In this paper, we consider a semantics-preservation mechanism that combines (1) the RT blocks from Simulink, and (2) task offset assignment to separate the time windows to access shared buffers by communicating tasks. We study the software synthesis problem that optimizes control performance by judiciously assigning task offsets, task priorities, and task communication mechanisms. We develop a problem-specific exact algorithm that uses an abstraction layer to hide the complexity of timing analysis. Experimental results show that it may run a few orders of magnitude faster than a direct formulation in integer linear programming. Shamit Bansal, Yecheng Zhao, Haibo Zeng 0001, Kehua Yang |
RTSS | 1 |