A nine-level packed U-cell (PUC9) multilevel converter is introduced as a submodule of a modular multi-level converter (MMC) to increase the voltage level by reducing the component counts. This topology would handle the DC fault current without needing the additional DC circuit breaker. PUC9 topology doubles the output voltage levels at the output of MMC with 33% more component counts rather than PUC5. The proposed configuration could be operated as a single DC source single-phase or three-phase multilevel converter with the capability of modularity and scalability. Voltage balancing integrated with level shift pulse width modulation (LS-PWM) technique is applied to balance three flying capacitors (FCs) voltages of each submodule without needing to an external controller. To validate the performance of the converter in transient and steady-state mode, PUC9-MMC is modeled in Matlab-Simulink and the results illustrate the appropriate waveforms in stand-alone mode.

Modular Multilevel Converter (MMC) is a promising topology that gained lot of interest in medium-voltage grid-connected applications due to its modularity, scalability, and adaptability. Although increasing the number of submodules per arm leads to a higher number of voltage levels and better waveforms quality, the size and then the cost of the converter remains a challenge. Therefore, a trade-off between topology complexity and power quality exists. This paper proposes an MMC based on Z Packed U-Cell converter as Submodule (ZPUC-SM) to generate a higher number of voltage levels with reduced number of SMs. When compared to HB-MMC, this topology features reduced components count for generating the same voltage levels. Thus, the candidate topology is considered to be a promising solution for medium-voltage applications connecting the utility. This paper details the design, modeling and control of ZPUC-MMC operating as a three-phase grid-connected converter. The controller task is to regulate output current to fulfill grid connectivity requirements. A Phase shifted-PWM with an integrated voltage balancing algorithm takes in action of controlling the three-capacitors voltages of each arm. Thus, no additional voltage controllers are required. The performance of the proposed converter along with its control system are validated with MATLAB/SIMULINK, and the simulation results validate the robustness and effectiveness of the proposed control during both steady-state and dynamic operations.

In this paper a sensor-less voltage balancing algorithm integrated with phase-shift pulsed width modulation (PS-PWM) is proposed to reduce the size of the flying capacitor (FC) on Packed U-cell (PUC5) converter. The size of the flying capacitor that is achieved by proposed method is the least value heretofore. In conventional modulation methods charge and discharge of the FC is carried out in power frequency. In contrast, in proposed method this process is accomplished in carrier frequency. Increased frequency of FC with PS-PWM carriers leads to highly reduce the FC size. Moreover, all the benefits of Phase-shift modulation such as filters size reduction and total harmonic distortion (THD) reduction is achieved. The comparison between previous literatures and the proposed method is carried out in this paper to compare among the size of FC. Simulation is run by Matlab/Simulink to validate the performance of this proposed method on stand alone and grid connected mode.

Z packed U-cell (ZPUC) is a novel generalized topology of multi-level converter which is appropriate to generate numerous voltage levels through single DC source. This topology is located as a submodule in modular multilevel converters (MMCs) aimed to increase the voltage levels and voltage stress reduction in switches simultaneously. Voltage balancing integrated with phase shift pulsed width modulation (PS-PWM) strategy without using external control system is employed in this paper to balance the voltage of flying capacitors (FCs). Matlab- Simulink is employed to simulate the ZPUC converter in three- phase system in stand-alone and grid connected mode. In addition, experimental tests are implemented on a 3 kVA prototype of ZPUC topology to validate the performance of the converter.

This paper presents the design of space vector modulation (SVM) technique to control the switches of single phase sensor-less 5-level Packed U-Cell inverter (PUC5) along with voltage balancing at flying capacitor. To generate five equal voltage levels at the output waveform, which results in reducing total harmonic distortion (THD) the switches of PUC5 should be properly triggered. Utilizing SVM technique by tuning the interval time among the state vectors on PUC5 inverter is discussed at this paper for voltage balancing at auxiliary capacitor. Moreover, appropriate patterns of switching states are used in this paper to reduce the switching losses by minimizing the transition from one state to another state. Simulation results by MATLAB Simulink are presented to validate the capability of proposed modulation technique. Furthermore, a comparison between the results of level shift pulsed width modulation technique (LS-PWM) and SVM is carried out to demonstrate the lower power loss of SVM.