EDBT 2026 Demo / reviewers in the wild / expert
Prawar Poudel
dblp:233/8642
· DBLP profile ↗
3ranked-venue papers
3as first author
1since 2021 · last 2021
0000-0002-4113-8458ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Storage systems · 88% Embedded and real-time systems · 12% | |
| Network and information security
2 papers |
Hardware security and side channels · 70% Cryptographic primitives and cryptanalysis · 30% |
Topics — the 7 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems › flash and SSD
flash memory |
0.8 | 2 | 2020 | Flashmark: Watermarking of NOR Flash Memories for Counterfeit Detection · DAC 2020 Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells · IEEE Trans. Computers 2019 |
Storage systems › flash and SSD › flash memory
NOR flash |
0.8 | 2 | 2020 | Flashmark: Watermarking of NOR Flash Memories for Counterfeit Detection · DAC 2020 Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells · IEEE Trans. Computers 2019 |
Hardware security and side channels
counterfeit IC detection |
0.4 | 1 | 2020 | Flashmark: Watermarking of NOR Flash Memories for Counterfeit Detection · DAC 2020 |
Hardware security and side channels › intellectual property protection
hardware watermarking |
0.4 | 1 | 2020 | Flashmark: Watermarking of NOR Flash Memories for Counterfeit Detection · DAC 2020 |
Cryptographic primitives and cryptanalysis › random number generation
true random number generator |
0.4 | 1 | 2019 | Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells · IEEE Trans. Computers 2019 |
Embedded and real-time systems › embedded processor
microcontroller |
0.1 | 1 | 2019 | Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells · IEEE Trans. Computers 2019 |
Embedded and real-time systems › resource-constrained systems
resource-constrained devices |
0.1 | 1 | 2019 | Microcontroller TRNGs Using Perturbed States of NOR Flash Memory Cells · IEEE Trans. Computers 2019 |
Methods — techniques the papers use, named apart from their topics
stress-based watermark imprinting · 0.9threshold voltage fluctuation · 0.8random telegraph noise · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Microcontroller Fingerprinting Using Partially Erased NOR Flash Memory CellsabstractElectronic device fingerprints, unique bit vectors extracted from device's physical properties, are used to differentiate between instances of functionally identical devices. This article introduces a new technique that extracts fingerprints from unique properties of partially erased NOR flash memory cells in modern microcontrollers. NOR flash memories integrated in modern systems-on-a-chip typically hold firmware and read-only data, but they are increasingly in-system-programmable, allowing designers to erase and program them during normal operation. The proposed technique leverages partial erase operations of flash memory segments that bring them into the state that exposes physical properties of the flash memory cells through a digital interface. These properties reflect semiconductor process variations and defects that are unique to each microcontroller or a flash memory segment within a microcontroller. The article explores threshold voltage variation in NOR flash memory cells for generating fingerprints and describes an algorithm for extracting fingerprints. The experimental evaluation utilizing a family of commercial microcontrollers demonstrates that the proposed technique is cost-effective, robust, and resilient to changes in voltage and temperature as well as to aging effects. Prawar Poudel, Biswajit Ray, Aleksandar Milenkovic |
ACM Trans. Embed. Comput. Syst. | 1 |
| 2020 | Flashmark: Watermarking of NOR Flash Memories for Counterfeit DetectionabstractCounterfeit electronics represents a significant concern because recycled, over-produced, out-of-spec, or cloned chips can enter globalized supply chains. This paper introduces Flashmark, a technique for watermarking of NOR flash memories for counterfeit detection. Flashmark relies on novel approaches for (a) imprinting watermarks into dedicated blocks of flash memory chips by repeated stressing, thus irreversibly changing physical properties of flash memory cells, and (b) reading out watermarks by sensing the changes in physical properties of flash cells through standard digital interfaces. The paper demonstrates Flashmark on embedded NOR flash memories in a family of low-cost microcontrollers. Prawar Poudel, Biswajit Ray, Aleksandar Milenkovic |
DAC | 1 |
| 2019 | Microcontroller TRNGs Using Perturbed States of NOR Flash Memory CellsabstractThis paper introduces a new technique that perturbs split-gate NOR Flash memory cells and extracts randomness of read noise to generate true random numbers. Flash memory cells exhibit threshold voltage fluctuations during read operations caused by thermal noise and random telegraph noise effects. Recent proposals demonstrate how these inherent properties of Flash memory cells can be used to create true random numbers in modern NAND Flash memories. However, they cannot be directly applied to NOR Flash memories in microcontrollers that have different architecture, improved data retention, high endurance, and are not as susceptible to noise as high-density NAND Flash memories. The proposed technique is experimentally demonstrated and evaluated using a family of commercial microcontrollers. The evaluation shows that it enables extraction of high-throughput random sequences that pass the NIST statistical tests. Advantages of the proposed technique are as follows: (a) it does not require any special hardware and/or interface modifications, (b) it is robust, cost-effective, and high-throughput, (c) it is entirely implemented in software, and (d) it is flexible and can be tailored to work in low-end microcontrollers that are often resource- or cost-constrained. Prawar Poudel, Biswajit Ray, Aleksandar Milenkovic |
IEEE Trans. Computers | 1 |