Demo Data from EDBT 2026 / reviewers in the wild / expert
Saad Zia Sheikh
dblp:234/0005
· DBLP profile ↗
4ranked-venue papers
4as first author
1since 2021 · last 2022
0000-0002-4534-7230ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 4 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 54% Energy-efficient computing · 36% Memory systems · 11% |
Topics — the 7 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Energy-efficient computing › power management
dynamic voltage and frequency scaling |
0.6 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Embedded and real-time systems › energy-efficient embedded systems
energy-efficient scheduling |
0.6 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Embedded and real-time systems › real-time scheduling › multicore scheduling
heterogeneous multicore scheduling |
0.6 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Energy-efficient computing
power management |
0.6 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Embedded and real-time systems
real-time scheduling |
0.6 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Memory systems
cache |
0.2 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Memory systems › cache management
cache partitioning |
0.2 | 1 | 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore Systems · IEEE Trans. Parallel Distributed Syst. 2022 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.6
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Energy-Efficient Cache-Aware Scheduling on Heterogeneous Multicore SystemsabstractThe adoption of heterogeneous multicore architectures into deadline-constrained embedded systems has various benefits in terms of schedulability and energy-efficiency. Existing energy-efficient algorithms, in this domain, allocate tasks to their energy-favorable core-types while using dynamic voltage and frequency scaling to reduce energy consumption. However, the practicality of such algorithms is limited due to the underlying assumptions made to simplify the analysis. This article paves the way for more practical approaches to minimize the energy consumption on heterogeneous multicores. Specifically, we investigate the nonlinear impacts that core-frequency and cache-partitioning have on task-executions in a heterogeneous multicore environment. In doing so, we propose an algorithm that exploits this relationship to effectively allocate tasks to specific cores and core-types, and determine the number of cache-partitions for each core. Extensive simulations using real-world benchmarks show the proficiency of our approach by achieving an average and maximum energy savings of 14.9 and 20.4 percent, respectively for core-level energy consumption, and 20.2 and 60.4 percent, respectively for system-level energy consumption. Saad Zia Sheikh, Muhammad Adeel Pasha |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2020 | Energy-efficient Real-time Scheduling on Multicores: A Novel Approach to Model Cache ContentionabstractWith the increasing demand for higher performance, the adoption of multicores has been a major stepping stone in the evolution of hard real-time systems. Though the computational bandwidth is increased due to parallel processing, the indispensable interactivity between the hierarchical memory sub-system and multiple cores has further aggravated the already complex worst case execution time (WCET) analysis of tasks. Furthermore, caches have the biggest influence on task execution time, and the inclusion of shared caches further increases the unpredictability of the system. Cache partitioning techniques have been proposed as a counter-measure to decouple the shared cache latency from the WCET. However, existing energy-efficient scheduling algorithms are oblivious to the unpredictable nature of shared caches or cache partitioning techniques, thus, diminishing their applicability to real-world systems. Without considering inter-task cache contention, directly using existing algorithms or attempting to allocate and schedule a taskset with cache-partition assignments can result in cache violations. To overcome this dilemma, we propose a novel approach to model inter-task cache contention as a dependency graph to be used by well-established algorithms to minimize energy consumption. Extensive simulations demonstrate the effectiveness of our approach to minimize energy consumption while also avoiding cache violations. Saad Zia Sheikh, Muhammad Adeel Pasha |
ACM Trans. Embed. Comput. Syst. | 1 |
| 2019 | An Improved Model for System-Level Energy Minimization on Real-Time SystemsabstractEnergy-efficient scheduling has become an essential branch in the evolution of real-time systems due to requirements for reliability and portability. Such scheduling algorithms exploit the varying voltage/frequency capability of a processor to reduce its energy consumption. However, most of these algorithms assume an inaccurate linear correlation between memory latency and core frequency. To make the matter worse, the inclusion of caches has tarnished the predictability of such systems while also increasing the total energy consumption. Therefore, improved system and task models are crucial for further progression in this domain. In this paper, we propose improvements to existing models in order to incorporate the above-mentioned complexities. We then propose techniques to minimize core-, cache-and system-level energy consumptions. Extensive simulations demonstrate the effectiveness of our approach and the impact each proposed technique has on total energy consumption of the processor. Saad Zia Sheikh, Muhammad Adeel Pasha |
MASCOTS | 1 |
| 2019 | Energy-Efficient Multicore Scheduling for Hard Real-Time Systems: A SurveyabstractAs real-time embedded systems are evolving in scale and complexity, the demand for a higher performance at a minimum energy consumption has become a necessity. Consequently, many embedded systems are now adopting multicore architectures into their design. However, scheduling on multicores is not a trivial task and scheduling to minimize the energy consumption further increases the complexity of the problem. This problem is especially aggravated for hard real-time systems where failure to meet a deadline can be catastrophic. Such scheduling algorithms yearn for a polynomial time complexity for the task-to-core assignment problem with an objective to minimize the overall energy consumption. There is now a trend toward heterogeneous multicores where cores differ in power, performance, and architectural capabilities. The desired performance and energy consumption is attained by assigning a task to the core that is best suited for it. In this article, we present a survey on energy-efficient multicore scheduling algorithms for hard real-time systems. We summarize various algorithms reported in the literature and classify them based on Partitioned, Semi-Partitioned, and Global scheduling techniques for both homogeneous and heterogeneous multicores. We also present a detailed discussion on various open issues within this domain. Saad Zia Sheikh, Muhammad Adeel Pasha |
ACM Trans. Embed. Comput. Syst. | 1 |