EDBT 2026 Demo / reviewers in the wild / expert
Jooyoung Hwang
dblp:235/1385
· DBLP profile ↗
8ranked-venue papers
1as first author
6since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 5 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | ColdMap: Compaction-Aware Cost-Benefit Zone Cleaning for ZNS-Based Key-Value Stores
Sungjin Byeon, Kyungwook Min, Jaewan Park, Hong-Yeon Kim, Junyoung Han, Jooyoung Hwang, Zhichao Cao 0002, Youngjae Kim 0001 |
ICS | 7 |
| 2024 | Towards A Unified Garbage Collection Strategy in ZNS Key-Value Store File Systems Using Same-Victim GCabstractZoned Namespace (ZNS) SSDs are gaining traction for eliminating in-device GC and enabling application-aware data management. BlobDB, an enhanced RocksDB with key-value separation, reduces compaction overhead but suffers from the GC over GC (GoG) problem, causing redundant data copying during BlobDB’s GC and Zone Cleaning (ZC). To address this, this paper proposes Same-Victim GC, aligning the victims and sizes of both GCs. Specifically, we introduce the BlobDB-Aware Zone Allocation (BAZA) algorithm to allocate blob files by creation order, eliminate victim file mismatch between two GCs, and $Z_{-} C u t o f f$ to minimize BlobDB’s GC size without additional overhead. Implemented in ZenFS v2.14 and RocksDB v7.4, our solution eliminates valid data copying, doubles compaction performance, and improves space utilization by $1.28 \times$. Hamin Hwangbo, Joseph Ro, Sungjin Byeon, Safdar Jamil, Jun Young Han, Jooyoung Hwang, Youngjae Kim 0001 |
MASCOTS | 6 |
| 2023 | Realizing Strong Determinism Contract on Log-Structured Merge Key-Value StoresabstractWe propose Vigil-KV , a hardware and software co-designed framework that eliminates long-tail latency almost perfectly by introducing strong latency determinism. To make Get latency deterministic, Vigil-KV first enables a predictable latency mode (PLM) interface on a real datacenter-scale NVMe SSD, having knowledge about the nature of the underlying flash technologies. Vigil-KV at the system-level then hides the non-deterministic time window (associated with SSD’s internal tasks and/or write services) by internally scheduling the different device states of PLM across multiple physical functions. Vigil-KV further schedules compaction/flush operations and client requests being aware of PLM’s restrictions thereby integrating strong latency determinism into LSM KVs. We implement Vigil-KV upon a 1.92TB NVMe SSD prototype and Linux 4.19.91, but other LSM KVs can adopt its concept. We evaluate diverse Facebook and Yahoo scenarios with Vigil-KV, and the results show that Vigil-KV can reducethe tail latency of a baseline KV system by 3.19× while reducing the average latency by 34%, on average. Miryeong Kwon, Hyunkyu Choi, Jooyoung Hwang, Myoungsoo Jung |
ACM Trans. Storage | 4 |
| 2022 | Vigil-KV: Hardware-Software Co-Design to Integrate Strong Latency Determinism into Log-Structured Merge Key-Value Stores
Miryeong Kwon, Hyunkyu Choi, Jooyoung Hwang, Myoungsoo Jung |
USENIX ATC | 4 |
| 2021 | ZNS+: Advanced Zoned Namespace Interface for Supporting In-Storage Zone Compaction
Kyuhwa Han, Hyunho Gwak, Dongkun Shin, Jooyoung Hwang |
OSDI | 4 |
| 2021 | Highly Available Packet Buffer Design With Hybrid Nonvolatile MemoryabstractInternet routers/switches are vulnerable to system failures which require a power reset. Tremendous efforts are made to guarantee the high availability of the systems. A recent work shows that a phase change memory (PCM)-based routing lookup table can achieve high availability in the destination lookup of routers/switches. However, a packet buffer in routers/switches cannot benefit from the lookup table approach because it requires a much larger and higher-bandwidth memory system and its memory traffic is equally divided into reads and writes, while routing table accesses are mostly read-dominant. PCM can provide high availability even when the system undergoes a power reset but exhibits unacceptable write bandwidth. In this work, we propose a magnetic RAM (MRAM)/PCM-based hybrid memory packet buffer and a packet mapping method. A small MRAM combined with a large PCM can outperform the dynamic random access memory (DRAM)-based packet buffer by 28.5% or 22.4% on average for internet-mix packet traffic when optimizing only bandwidth or both bandwidth and lifetime. The proposed adaptive packet mapping method maps small packets less than a predetermined packet size threshold to MRAM for maximizing PCM bandwidth as small packets degrade row buffer locality in PCM. In addition, the mapping method dynamically changes the packet size threshold to capture the working set of packet buffering, which significantly improves PCM lifetime. Yongwoon Song, Jooyoung Hwang, Insoon Jo, Hyuk-Jun Lee |
IEEE Trans. Very Large Scale Integr. Syst. | 2 |
| 2020 | DC-Store: Eliminating Noisy Neighbor Containers using Deterministic I/O Performance and Resource Isolation
Miryeong Kwon, Donghyun Gouk, Changrim Lee, Byounggeun Kim, Jooyoung Hwang, Myoungsoo Jung |
FAST | 5 |
| 2015 | Social Media on Smartphones for Restaurant Decision-Making Process
Jooyoung Hwang |
ENTER | 1 |