Shaleen Garg

dblp:235/7044 · DBLP profile ↗
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2ranked-venue papers
2as first author
1since 2021 · last 2024
0009-0005-8680-7677ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 77% Memory systems · 23%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Operating systems › i/o
i/o subsystem
0.812024
CrossPrefetch: Accelerating I/O Prefetching for Modern Storage · ASPLOS (1) 2024
Storage systems › i/o optimization
i/o prefetching
0.812024
CrossPrefetch: Accelerating I/O Prefetching for Modern Storage · ASPLOS (1) 2024
Memory systems › cache
cache miss
0.212024
CrossPrefetch: Accelerating I/O Prefetching for Modern Storage · ASPLOS (1) 2024

Methods — techniques the papers use, named apart from their topics

cross-layer OS-runtime coordination · 1.5
YearPublicationVenuePosition
2024 CrossPrefetch: Accelerating I/O Prefetching for Modern Storage
abstract
We introduce CrossPrefetch, a novel cross-layered I/O prefetching mechanism that operates across the OS and a user-level runtime to achieve optimal performance. Existing OS prefetching mechanisms suffer from rigid interfaces that do not provide information to applications on the prefetch effectiveness, suffer from high concurrency bottlenecks, and are inefficient in utilizing available system memory. CrossPrefetch addresses these limitations by dividing responsibilities between the OS and runtime, minimizing overhead, and achieving low cache misses, lock contentions, and higher I/O performance.
Shaleen Garg, Rekha Pitchumani, Manish Parashar, Sudarsun Kannan
ASPLOS (1)1
2018 Share-a-GPU: Providing Simple and Effective Time-Sharing on GPUs
abstract
Time-sharing, which allows for multiple users to use a shared resource, is an important and fundamental aspect of modern computing systems. However, accelerators such as GPUs, that come without a native operating system do not support time sharing. The inability of accelerators to support time-sharing limits their applicability especially as they get deployed in Platform-as-a-Service and Resource-as-a-Service environmen ts. In the former, elastic demands may require preemption where as in the latter, fine-grained economic models of service cost can be supported with time sharing. In this paper, we extend the concept of time sharing to the GPGPU computational space using cooperative multitasking approach. Our technique is applicable to any GPGPU program written in Compute Unified Device Architecture (CUDA) API provided for C/C++ programming languages. With minimal support from the programmer, our framework incorporates process scheduling, light-weight memory management, and multi-GPU support. Our framework provides an abstraction where, in a round-robin manner, every workload can use a GPU(s) over a time quantum exclusively. We demonstrate the applicability of our scheduling framework, by running many workloads concurrently in a time sharing manner.
Shaleen Garg, Kishore Kothapalli, Suresh Purini
HiPC1