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Demo Data from EDBT 2026 / reviewers in the wild / expert

Xiyuan Feng

dblp:236/0185 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2026
0000-0001-8261-875XORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 50% Electronic design automation · 50%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
3d integration		 1.012026
A Reliable ESD 3D-Integrated Design and Simulation (3D-IDS) Methodology for Wafer-on-Wafer Stacked DRAM · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026

Methods — techniques the papers use, named apart from their topics

three-dimensional integrated circuit simulation · 1.0
YearPublicationVenuePosition
2026 A Reliable ESD 3D-Integrated Design and Simulation (3D-IDS) Methodology for Wafer-on-Wafer Stacked DRAM
Xuerong Jia, Fujun Bai, Xiyuan Feng, Li Geng
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.6