Approximate memories provide energy savings or performance improvements at the cost of occasional errors in stored data. Applications that tolerate errors on their data profit from this trade-off by controlling these errors to not affect critical data. This control usually involves programmer intervention with annotations in the source code. To avoid annotations, some techniques protect critical data that are common on many applications, isolating specific memory regions from errors. In this work, we propose and explore alternatives for the protection of application critical data by managing a supervisor execution environment with an approximate memory system. We expose only dynamically allocated data to errors with secure data manipulation through an approximate allocation scheme that divide stored data based on the approximation of the heap area. We evaluate 6 applications with different data access profiles and obtain up to 20% of energy savings.

Representing the interaction between accurate and approximate hardware modules at the architecture level is essential to understand the impact of Approximate Computing in a general-purpose computing scenario. However, extensive effort is required to model approximations into a baseline instruction-level simulator and collect its execution metrics. In this work, we present the AxPIKE ISA simulation environment, a tool that allows designers to inject models of hardware approximation at the instruction level and evaluate their impact on the quality of results. AxPIKE embeds a high-level representation of a RISC-V system and produces a dedicated control mechanism, that allows the simulated software to manage the approximate behavior of compatible execution scenarios. The environment also provides detailed execution statistics that are forwarded to dedicated tools for energy accounting. We apply the AxPIKE environment to inject integer multiplication and memory access approximations into different applications and demonstrate how the generated statistics are translated into energy-quality trade-offs.

Approximate systems are designed to offer improved efficiency with potentially reduced quality of results. Quality of output in these systems is typically quantified in comparison to a precise result using metrics such as RMSE, MAE, PSNR, or application-specific metrics such as structural similarity of images (SSIM). Furthermore, systems are typically designed to maximize efficiency for a given minimum quality requirement. It is often difficult to determine what this quality requirement should be for an application, let alone a system. Thus, a fixed quality requirement may be overly conservative, and leave optimization opportunities on the table. In this work, we present a different approach to evaluate approximate systems based on the usefulness of results instead of quality. Our method qualitatively determines the acceptability of approximate results within different processing pipelines. To demonstrate the method, we implement three image and signal processing applications featuring scenarios of image classification, image recognition, and frequency estimation. Our results show that designing approximate systems to guarantee acceptability can produce up to 20% more valid results than the conservative quality thresholds commonly adopted in the literature, allowing for higher error rates and, consequently, lower energy cost.

Approximate Computing offers enhanced energy efficiency by exploring quality relaxation on applications. Application-agnostic hardware-level techniques can provide high benefits under certain scenarios, but their integration on a general-purpose architecture presents novel control challenges. We present Risk-5, an extension of the RISC-V architecture that implements control mechanisms to orchestrate multiple coexisting approximation techniques within an architecture. In Risk-5, approximate hardware capabilities are exposed to software through identification registers, data structures, and drivers that describe the nature and configuration parameters for each approximate design. This allows the software stack to control what and how much is approximated in an application. Control options range from activating or deactivating a certain approximation (e.g., approximating ALU operations), to configuring allowable error levels (e.g., for a configurable FPU), and configuring operation parameters that may lead to probabilistic errors (e.g., setting the refresh rate for an approximate SDRAM). Approximations may be dynamically configured and combined at runtime, allowing for simplified design space exploration. Finally, supervisor- and machine-level control allows for the use of certain approximations without requiring changes to applications. In this article, we discuss the implementation of different classes of approximation techniques, detailing and evaluating how they interact with each other. Risk-5 and the selected approximations are demonstrated in the functional level in a RISC-V ISA simulator augmented with an approximate computing framework. Our experiments evaluate how six applications from different computing domains behave when subjected to a combination of approximation techniques. Our results show how Risk-5 can bridge the gap between software and hardware approximations, allowing designers to easily evaluate energy-quality tradeoffs.

Recent research has introduced approximate hardware units that produce incorrect outputs deterministically or probabilistically for some small subset of inputs but allow significantly higher throughput or lower power than their errorfree counterparts. The integration, validation, and evaluation of these approximate units in architectures and processors, however, remains challenging. In this paper, we introduce ADeLe, a high-level language for the description, configuration, and integration of approximate hardware units into processors. ADeLe reduces the design effort for approximate hardware by modeling approximations at a high level of abstraction and automatically injecting them into a processor model for architectural simulation. Approximations in ADeLe may modify or completely replace the functional behavior of instructions according to user-defined policies. Instructions may be approximated deterministically or probabilistically (e.g., based on operating voltage and frequency). To allow for controlled testing, approximations may be enabled and disabled from software. Energy is automatically accounted based on customizable models that consider the potential power savings of the approximations that are enabled in the system. ADeLe provides designers with a generic and flexible verification framework, allowing them to easily evaluate the energy-quality trade-offs of their designs in applications. We demonstrate the language and corresponding framework by introducing different approximation techniques into a processor model, on top of which we run selected applications. We demonstrate ADeLe using 6 approximate designs with 4 image processing and 2 floating point applications. Our experiments show how ADeLe may be used to generate approximate CPUs and to evaluate energy-quality trade-offs for different applications with reduced effort.