EDBT 2026 Demo / reviewers in the wild / expert
Anish Singhani
dblp:236/4454
· DBLP profile ↗
2ranked-venue papers
2as first author
1since 2021 · last 2023
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Audio and music processing · 100% | |
| Human-computer interaction and pervasive computing
1 paper |
Accessibility and assistive technology · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Reconfigurable computing and FPGAs · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Audio and music processing › spatial audio
head-related transfer function |
0.4 | 1 | 2020 | Real-Time Spatial 3D Audio Synthesis on FPGAs for Blind Sailing · FPGA 2020 |
Audio and music processing › spatial audio
spatial audio generation |
0.4 | 1 | 2020 | Real-Time Spatial 3D Audio Synthesis on FPGAs for Blind Sailing · FPGA 2020 |
Accessibility and assistive technology › assistive navigation
navigation assistance for visually impaired |
0.1 | 1 | 2020 | Real-Time Spatial 3D Audio Synthesis on FPGAs for Blind Sailing · FPGA 2020 |
Methods — techniques the papers use, named apart from their topics
crossfading · 1.3FIR filtering · 1.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | Open-Source, End-to-End Auditable Tapeout of Hardware Cryptography ModuleabstractIncreasing concerns about data security and backdoored encryption hardware highlight the necessity for fully auditable chip design and fabrication processes. A fully open-source, traceable manufacturing of a chip would allow a system integrator or end-user to check for tampering which may have potentially occurred during design or fabrication. In this paper, we present the first fully end-to-end open-source, silicon-proven cryptography chip, implementing the AES-256 symmetric cipher. We demonstrate our flow for design-space exploration, followed by a successful tapeout of our chip on the SKY130 process node using an open-source RTL-to-GDS pipeline. In addition, we present our methods for bringing up the silicon despite clocking issues, and results proving the functionality of our process. To foster reproducibility and extensibility, all steps from our work, including the fabricated GDS files, are released under an open-source license and are backed by fully-open toolchains. Anish Singhani |
ISCAS | 1 |
| 2020 | Real-Time Spatial 3D Audio Synthesis on FPGAs for Blind SailingabstractThe real-time synthesis of 3D spatial audio has many applications, from virtual reality to navigation for the visually-impaired. Head-related transfer functions (HRTF) can be used to generate spatial audio based on a model of the user's head. Previous studies have focused on the creation and interpolation of these functions with little regard for real-time performance. In this paper, we present an FPGA-based platform for real-time synthesis of spatial audio using FIR filters created from head-related transfer functions. For performance reasons, we run filtering, crossfading, and audio output on FPGA fabric, while calculating audio source locations and storing audio files on the CPU. We use a head-mounted 9-axis IMU to track the user's head in real-time and adjust relative spatial audio locations to create the perception that audio sources are fixed in space. Our system, running on a Xilinx Zynq Z-7020, is able to support 4X more audio sources than a comparable GPU and 8X more sources than a CPU while maintaining sub-millisecond latency and comparable power consumption. Furthermore, we show how our system can be leveraged to communicate the location of landmarks and obstacles to a visually-impaired user during a sailing race or other navigation scenario. We test our system with multiple users and show that, as a result of our reduced latency, a user is able to locate a virtual audio source with an extremely high degree of accuracy and navigate toward it. Anish Singhani, Alexander Morrow |
FPGA | 1 |