Resistive random-access memory (ReRAM) is a promising non-volatile memory technology. However, its crossbar array structure leads to a severe problem known as sneak path interference (SPI), which is correlated and data-dependent. From an information-theoretic perspective, memory systems like ReRAM can be considered as special types of communication channels. Inspired by deep learning applications in communication systems, the detection of ReRAM channels with SPI was formulated as a learning problem recently, and a multi-layer perceptron (MLP) network was employed to mitigate SPI. However, it requires a large amount of training data to achieve satisfactory performance. In this paper, we first propose a bidirectional long short-term memory (BiLSTM) based detector for ReRAM to exploit the correlation between memory cells introduced by SPI. Moreover, a few-shot learning algorithm based on meta-transfer learning (MTL) is proposed to further improve the generalization ability of the detector. The bit error rate (BER) bound and generalization bound are also derived to verify the effectiveness of our proposed schemes. Simulation results demonstrate that the BiLSTM-based detector with MTL can dramatically reduce the required training samples by four to five orders of magnitude while improving the BER performance compared to the existing MLP-based detection scheme.

Resistive random-access memory is one of the most promising candidates for the next generation of non-volatile memory technology. However, its crossbar array structure causes severe “sneak-path” interference, which also leads to strong inter-cell correlation. Recent works have mainly focused on sub-optimal data detection schemes by ignoring inter-cell correlation and assuming sneak-path interference is independent between different array cells. In this paper, we propose a near-optimal data detection scheme that can approach the performance bound of the optimal detection scheme. Our detection scheme leverages a joint data and sneak-path interference recovery and can use all inter-cell correlations. The proposed scheme is suitable for data detection of large memory arrays with only linear operation complexity.

The sneak path (SP) interference problem in resistive random access memory (ReRAM) severely affects the data storage reliability. Recent works showed that the occurrence of the SP is highly related to the selector failures (SFs) in the resistive memory arrays. In this work, we propose a novel scheme to detect the location of the failed selector, based on the signal read back from the memory array. The detected SF location information can be used to assist the data detection to mitigate the SP interference or to construct SP-free constrained codes.

Resistive random-access memory (ReRAM) is a promising candidate for the next generation non-volatile memory technology due to its simple read/write operations and high storage density. However, its crossbar array structure causes a severe interference effect known as the “sneak path.” In this paper, we propose channel coding techniques that can mitigate both the sneak-path interference and the channel noise. The main challenge is that the sneak-path interference is data-dependent, and also correlated within a memory array, and hence the conventional error correction coding scheme will be inadequate. In this work, we propose an across-array coding strategy that assigns a codeword to multiple independent memory arrays, and exploit a real-time channel estimation scheme to estimate the instantaneous status of the ReRAM channel. Since the coded bits from different arrays experience independent channels, a “diversity” gain can be obtained during decoding, and when the codeword is adequately distributed over different memory arrays, the code actually performs as that over an uncorrelated channel. By performing decoding based on the scheme of treating-interference-as-noise (TIN), the ReRAM channel over different memory arrays is equivalent to a block varying channel we defined, for which we propose both the capacity bounds and a coding scheme. The proposed coding scheme consists of a serial concatenation of an optimized error correction code with a data shaper, which enables the ReRAM system to achieve a near capacity limit storage efficiency.

In this paper, we propose channel coding techniques that can mitigate both the sneak-path interference and the channel noise for resistive random-access memory (ReRAM) channels. The main challenge is that the sneak-path interference is data-dependent, and also correlated within a memory array, and hence the conventional error correction coding scheme will be inadequate. We propose an across-array coding scheme, which assigns a code-word to multiple independent memory arrays. Since the coded bits from different arrays experience independent channels, a “diversity” gain can be obtained during decoding, and when the code-word is adequately distributed over different memory arrays, the code actually performs as that over an uncorrelated channel. We also present a real-time channel estimation scheme together with an elementary signal estimator (ESE) to obtain the instant channel status as well as the soft information of the channel coded bits for decoding. By further combining with a data shaping technique to produce an optimized channel input distribution, significant error performance gain is obtained.

The protograph low‐density parity‐check (LDPC) codes possess many attractive properties, such as the low encoding/decoding complexity and better error floor performance, and hence have been successfully applied to different types of communication and data storage channels. In this study, the authors design protograph LDPC codes for communication systems corrupted by the impulsive noise, which are modelled as additive white symmetric alpha‐stable noise (AWS SN) channels. They start by presenting a novel simulation‐based protograph extrinsic information transfer analysis to derive the iterative decoding threshold of the protograph codes. By further applying the asymptotic weight distribution analysis, the authors design new protograph codes for the AWS SN channel. Both theoretical analysis and simulation results demonstrate that the proposed protograph codes can provide better error rate performance than the prior art AR4JA code, the irregular codes optimised for the AWGN channel, as well as the irregular codes optimised for the AWS SN channel.

The memory physics induced unknown offset of the channel is a critical and difficult issue to be tackled for many non-volatile memories (NVMs). In this paper, we first propose novel neural network (NN) detectors by using the multilayer perceptron (MLP) network and the recurrent neural network (RNN), which can effectively tackle the unknown offset of the channel. However, compared with the conventional threshold detector, the NN detectors will incur a significant delay of the read latency and more power consumption. Therefore, we further propose a novel dynamic threshold detector (DTD), whose detection threshold can be derived based on the outputs of the proposed NN detectors. In this way, the NN-based detection only needs to be invoked when the error correction code (ECC) decoder fails, or periodically when the system is in the idle state. Thereafter, the threshold detector will still be adopted by using the adjusted detection threshold derived base on the outputs of the NN detector, until a further adjustment of the detection threshold is needed. Simulation results demonstrate that the proposed DTD based on the RNN detection can achieve the error performance of the optimum detector, without the prior knowledge of the channel.