Demo Data from EDBT 2026 / reviewers in the wild / expert
Artem Marisov
dblp:236/6632
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2019
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
system-level design |
0.4 | 1 | 2019 | Visual System Integrator: Invited Tutorial · FPGA 2019 |
Electronic design automation › design representation
behavioral modeling |
0.1 | 1 | 2019 | Visual System Integrator: Invited Tutorial · FPGA 2019 |
Methods — techniques the papers use, named apart from their topics
runtime profiling · 0.4behavioral modelling · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2019 | Visual System Integrator: Invited TutorialabstractVisual System Integrator (VSI) provides behavioural modelling and automated design of entire systems of digital and software running on heterogeneous devices and heterogeneous accelerators. VSI provides run time profiling and metric reporting the tool also provides users with everything needed for rapid design explorations, behavioural and/or RTL simulations, hardware in loop, external processors, and FPGA design creation of heterogeneous features, including embedded processors, memories and interfaces. Sandeep Dutta, Adnan Yunus, Artem Marisov, Matt Menezes, Somayeh Rahimipour |
FPGA | 3 |