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Martha Barker

dblp:237/9330 · DBLP profile ↗
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4ranked-venue papers
3as first author
3since 2021 · last 2025
0009-0002-6677-1724ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author · 2 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021Theory of computation · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 77% Electronic design automation · 23%
Software engineering, system software, and programming languages
1 paper
Runtime systems and virtual machines · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs
FPGA accelerator
0.612022
Synthesized Garbage Collection for FPGA Accelerators · FPGA 2022
Runtime systems and virtual machines › garbage collection
concurrent garbage collection
0.212022
Synthesized Garbage Collection for FPGA Accelerators · FPGA 2022
Runtime systems and virtual machines
garbage collection
0.212022
Synthesized Garbage Collection for FPGA Accelerators · FPGA 2022
Electronic design automation
high-level synthesis
0.212022
Synthesized Garbage Collection for FPGA Accelerators · FPGA 2022

Methods — techniques the papers use, named apart from their topics

high-level synthesis · 1.1concurrent synchronization · 1.1
YearPublicationVenuePosition
2025 Automated Power Domain Insertion and Control in Dataflow Circuits
abstract
Energy efficiency is a key concern in circuit design. With the end of Dennard scaling, voltages no longer scale with transistor size, making full-capacity operation unsustainable due to heat and power limits. Power gating offers a solution, but controlling independent power domains is challenging. Large domains are manageable but inefficient; small domains are efficient but require intricate control.
Martha Barker, Mark Santolucito, Stephen A. Edwards, Martha A. Kim
MEMOCODE1
2022 Synthesized Garbage Collection for FPGA Accelerators
abstract
Speed and ease of accelerator design is a growing need. High level programming languages have provided significant gains in the software world, but lag in the hardware realm. We present a hardware implementation of a garbage collector, which automates memory management, one of the major conveniences of modern software languages. Our garbage collector is integrated with a Haskell to hardware HLS flow. The collector runs concurrently with the application, using already-idle memory slots to do its work with little to no impact on performance. To achieve this, our collector exploits rapid synchronization that is straightforward in hardware but very difficult in software. With this synchronization, the collector is able to safely pop in and out of very fine pockets of idleness on a cycle by cycle, heap by heap basis. In most cases our collector incurred negligible overhead, and slowed the application only when the heaps were so tiny that the application was unable to proceed with its operation until the collector had freed more space. Our experiments further show that our concurrent collector performs best under an eager collection policy that collects garbage well-before the application exhausts the available memory. Although this eager strategy performs more collection operations than strictly necessary, the application never pauses and the collector operates entirely in the background.
Martha Barker, Stephen A. Edwards, Martha A. Kim
FPGA1
2022 Synthesized In-BramGarbage Collection for Accelerators with Immutable Memory
abstract
Speed and ease of accelerator design is a growing need. High level programming languages have provided significant gains in the software world, but lag for hardware. We present a hardware implementation of a garbage collector that automates memory management, one of the major conveniences of modern software languages. Our garbage collector runs concurrently with the application it serves, using already-idle memory slots to do its work with little to no impact on performance. To achieve this, our collector exploits rapid synchronization that is straightforward in hardware but difficult in software. This synchronization enables the collector to interleave with fine pockets of idleness on a per-cycle, per-heap basis. Our collector typically incurred negligible overhead, only slowing the application to wait for collection to free memory when the heaps were so small that the collector could not keep pace with allocation. We also found that our concurrent collector performs best under an eager collection policy that collects garbage well before the application exhausts the available memory. Although this eager strategy performs more collection operations than strictly necessary, the application never pauses because our collector operates entirely in the background.
Martha Barker, Stephen A. Edwards, Martha A. Kim
FPL1
2019 Compositional Dataflow Circuits
abstract
We present a technique for implementing dataflow networks as compositional hardware circuits. We first define an abstract dataflow model with unbounded buffers that supports data-dependent blocks (mux, demux, and nondeterministic merge); we then show how to faithfully implement such networks with bounded buffers and handshaking. Handshaking admits compositionality: our circuits can be connected with or without buffers, and combinational cycles arise only from a completely unbuffered cycle. While bounding buffer sizes can cause the system to deadlock prematurely, the system is guaranteed to produce the same, correct, data before then. Thus, unless the system deadlocks, inserting or removing buffers only affects its performance. We demonstrate how this enables design space to be explored.
Stephen A. Edwards, Richard Townsend, Martha Barker, Martha A. Kim
ACM Trans. Embed. Comput. Syst.3