Demo Data from EDBT 2026 / reviewers in the wild / expert
Aodi He
dblp:238/6517
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2024
0009-0007-4778-5457ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 91% Processor architecture and microarchitecture · 9% | |
| Network and information security
1 paper |
Hardware security and side channels · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels › hardware trojan
hardware trojan detection |
0.8 | 1 | 2024 | On Modeling and Detecting Trojans in Instruction Sets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024 |
Electronic design automation
hardware verification and test |
0.8 | 1 | 2024 | On Modeling and Detecting Trojans in Instruction Sets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024 |
Electronic design automation
model checking |
0.8 | 1 | 2024 | On Modeling and Detecting Trojans in Instruction Sets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024 |
Electronic design automation › model checking
unbounded model checking |
0.8 | 1 | 2024 | On Modeling and Detecting Trojans in Instruction Sets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024 |
Processor architecture and microarchitecture
instruction set architecture |
0.2 | 1 | 2024 | On Modeling and Detecting Trojans in Instruction Sets · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024 |
Methods — techniques the papers use, named apart from their topics
unbounded model checking · 1.5slicing · 1.5head-point replacement · 1.5backward implication · 1.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | On Modeling and Detecting Trojans in Instruction SetsabstractAmid growing concerns about hardware security, comprehensive security testing has become essential for chip certification. This paper proposes a deep-testing method for identifying Trojans of particular concern to middle-to-high-end users, with a focus on illegal instructions. A hidden instruction Trojan can employ a low-probability sequence of normal instructions as a boot sequence, which is followed by an illegal instruction that triggers the Trojan. This enables the Trojan to remain deeply hidden within the processor. It then exploits an intrusion mechanism to acquire Linux control authority by setting a hidden interrupt as its payload. We have developed an unbounded model checking (UMC) technique to uncover such Trojans. The proposed UMC technique has been optimized with slicing based on the input cone, head-point replacement, and backward implication. Our experimental results demonstrate that the presented instruction Trojans can survive detection by existing methods, thus allowing normal users to steal root user privileges and compromising the security of processors. Moreover, our proposed deep-testing method is empirically shown to be a powerful and effective approach for detecting these instruction Trojans. Ying Zhang 0040, Aodi He, Ahmed Rezine, Zebo Peng, Erik Larsson, Jianhui Jiang, Huawei Li 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |