Rishabh Iyer 0002

dblp:238/8014 · also Rishabh R. Iyer · DBLP profile ↗
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17ranked-venue papers
5as first author
13since 2021 · last 2026
0009-0008-5599-8636ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 9 · 2 first-author · 7 since 2021Software engineering, systems software and programming languages · 7 · 3 first-author · 6 since 2021Systems, architecture and hardware · 1
YearPublicationVenuePosition
2026 CrossCheck: Input Validation for WAN Control Systems
Alexander Krentsel, Rishabh Iyer 0002, Isaac Keslassy, Bharath Modhipalli, Sylvia Ratnasamy, Anees Shaikh, Rob Shakir
NSDI2
2025 Towards Structurally Extensible Host Network Stacks
abstract
Several recent proposals have shown that re-architecting the host network stack can significantly improve throughput and reduce tail latency. Yet these designs remain confined to user-level stacks or invasive kernel forks, both of which are impractical for production deployment.
Kumar Kartikeya Dwivedi, Rishabh Iyer 0002, Sanidhya Kashyap
HotNets2
2025 Rethinking the Cost of Distributed Caches for Datacenter Services
abstract
This paper systematically studies the cost impact of distributed in-memory caches on datacenter services. While memory used for these caches is often perceived to be expensive, we find that the resulting CPU savings from these in-memory caches far outweigh the cost of added memory. In fact, across a variety of both synthetic and production workloads, we find that adding distributed in-memory caches can lower total operating costs by 3 – 4×, even without considering their latency benefits. These cost savings can vary significantly across various architectures, such as storage layer caches, remote lookaside caches, and in-memory linked caches. We additionally evaluate cost for two emerging scenarios: caching rich application objects and strongly consistent cache. For the former, we find that caching application objects provides outsized benefits compared to their denormalized, key-value-style variants, up to 8× compared to reading from storage. For the latter, we observe that even a minimal version check for consistency can eliminate most of the cost benefits, calling for new designs for cost-effective consistent cache.
Ziming Mao, Jonathan D. Ellithorpe, Atul Adya, Rishabh Iyer 0002, Matei Zaharia, Scott Shenker, Ion Stoica
HotNets4
2025 Fast End-to-End Performance Simulation of Accelerated Hardware-Software Stacks
Jiacheng Ma 0002, Jonas Kaufmann, Emilien Guandalino, Rishabh Iyer 0002, Thomas Bourgeat, George Candea
SOSP4
2024 The Case for Validating Inputs in Software-Defined WANs
abstract
We highlight a problem that the networking community has largely overlooked: ensuring that the inputs to network controllers in Software-Defined Network (SDN) WANs correctly reflect the state of the network. We show that "incorrect" inputs are a common cause of major outages in production and propose new directions to address these.
Alexander Krentsel, Rishabh Iyer 0002, Isaac Keslassy, Sylvia Ratnasamy, Anees Shaikh, Rob Shakir
HotNets2
2024 Revisiting Cache Freshness for Emerging Real-Time Applications
abstract
Caching is widely used in industry to improve application performance by reducing data-access latency and taking the load off the backend infrastructure. TTLs have become the de-facto mechanism used to keep cached data reasonably fresh (i.e., not too out of date with the backend). However, the emergence of real-time applications requires tighter data freshness, which is impractical to achieve with TTLs. We discuss why this is the case, and propose a simple yet effective adaptive policy to achieve the desired freshness.
Ziming Mao, Rishabh Iyer 0002, Scott Shenker, Ion Stoica
HotNets2
2024 If Layering is useful, why not Sublayering?
abstract
The Internet's success arose from classical layering: protocols like TCP and Ethernet can be independently understood, changed, debugged, verified, and offloaded to hardware using a clean service interface between layers. To accrue the same benefits at a finer grain, we suggest sublayering, i.e., layering recursively within each layer. We show that the data link and routing layers have natural sublayers. However, while TCP intuitively decomposes into sub-functions (connection management, reliable delivery, congestion control) common state variables like sequence numbers and window sizes entangle these functions, making sublayering difficult. We propose an alternate sublayered TCP with equivalent functionality which enables easily changing congestion control and connection management. We also argue that sublayering can help create robust and verified Internet protocol implementations akin to seL4 for Operating Systems. To this end, we describe early experiments with a verified sublayered implementation of a simple bit-stuffing protocol using Coq, and a verified monolithic implementation of a lightweight TCP using Dafny. We end with a set of challenges for sublayered protocols.
Rathin Singha, Rishabh Iyer 0002, Charles Liu, Caleb Terrill, Todd D. Millstein, Scott Shenker, George Varghese
HotNets2
2024 Performance Interfaces for Hardware Accelerators
Jiacheng Ma 0002, Rishabh Iyer 0002, Sahand Kashani, Mahyar Emami, Thomas Bourgeat, George Candea
OSDI2
2024 Automatically Reasoning About How Systems Code Uses the CPU Cache
Rishabh Iyer 0002, Katerina J. Argyraki, George Candea
OSDI1
2024 Fast, Flexible, and Practical Kernel Extensions
abstract
The ability to safely extend OS kernel functionality is a longstanding goal in OS design, with the widespread use of the eBPF framework in Linux and Windows demonstrating the benefits of such extensibility. However, existing solutions for kernel extensibility (including eBPF) are limited and constrain users either in the extent of functionality that they can offload to the kernel or the performance overheads incurred by their extensions.
Kumar Kartikeya Dwivedi, Rishabh Iyer 0002, Sanidhya Kashyap
SOSP2
2023 The Case for Performance Interfaces for Hardware Accelerators
abstract
While systems designers are increasingly turning to hardware accelerators for performance gains, realizing these gains is painstaking and error-prone. It can take several person-months to determine if a given accelerator is a good fit for a given piece of code, and accelerators that cost millions of dollars to build can slow down the very systems they were designed to accelerate.
Rishabh Iyer 0002, Jiacheng Ma 0002, Katerina J. Argyraki, George Candea, Sylvia Ratnasamy
HotOS1
2023 Achieving Microsecond-Scale Tail Latency Efficiently with Approximate Optimal Scheduling
abstract
Datacenter applications expect microsecond-scale service times and tightly bound tail latency, with future workloads expected to be even more demanding. To address this challenge, state-of-the-art runtimes employ theoretically optimal scheduling policies, namely a single request queue and strict preemption.
Rishabh Iyer 0002, Musa Unal, Marios Kogias, George Candea
SOSP1
2022 Performance Interfaces for Network Functions
Rishabh Iyer 0002, Katerina J. Argyraki, George Candea
NSDI1
2020 Bypassing the load balancer without regrets
abstract
Load balancers are a ubiquitous component of cloud deployments and the cornerstone of workload elasticity. Load balancers can significantly affect the end-to-end application latency with their load balancing decisions, and constitute a significant portion of cloud tenant expenses.
Marios Kogias, Rishabh Iyer 0002, Edouard Bugnion
SoCC2
2019 Performance Contracts for Software Network Functions
Rishabh Iyer 0002, Luis Pedrosa, Arseniy Zaostrovnykh, Solal Pirelli, Katerina J. Argyraki, George Candea
NSDI1
2019 Verifying software network functions with no verification expertise
abstract
We present the design and implementation of Vigor, a software stack and toolchain for building and running software network middleboxes that are guaranteed to be correct, while preserving competitive performance and developer productivity. Developers write the core of the middlebox---the network function (NF)---in C, on top of a standard packet-processing framework, putting persistent state in data structures from Vigor's library; the Vigor toolchain then automatically verifies that the resulting software stack correctly implements a specification, which is written in Python.
Arseniy Zaostrovnykh, Solal Pirelli, Rishabh Iyer 0002, Matteo Rizzo, Luis Pedrosa, Katerina J. Argyraki, George Candea
SOSP3
2018 Automated synthesis of adversarial workloads for network functions
abstract
Software network functions promise to simplify the deployment of network services and reduce network operation cost. However, they face the challenge of unpredictable performance. Given this performance variability, it is imperative that during deployment, network operators consider the performance of the NF not only for typical but also adversarial workloads. We contribute a tool that helps solve this challenge: it takes as input the LLVM code of a network function and outputs packet sequences that trigger slow execution paths. Under the covers, it combines directed symbolic execution with a sophisticated cache model to look for execution paths that incur many CPU cycles and involve adversarial memory-access patterns. We used our tool on 11 network functions that implement a variety of data structures and discovered workloads that can in some cases triple latency and cut throughput by 19% relative to typical testing workloads.
Luis Pedrosa, Rishabh Iyer 0002, Arseniy Zaostrovnykh, Jonas Fietz, Katerina J. Argyraki
SIGCOMM2