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Shuichi Yamamoto

dblp:239/0036 · DBLP profile ↗
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3ranked-venue papers
1as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
process simulation
0.031987
A Two-Dimensional Etching Profile Simulator: ESPRIT · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
A Two-Dimensional Integrated Process Simulator: SPIRIT-I · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
A New Two-Dimensional Silicon Oxidation Model · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Electronic design automation › technology computer-aided design
process and device simulation
0.011987
A Two-Dimensional Integrated Process Simulator: SPIRIT-I · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Electronic design automation › semiconductor manufacturing
lithographic patterning
0.011987
A Two-Dimensional Etching Profile Simulator: ESPRIT · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987

Methods — techniques the papers use, named apart from their topics

viscoelastic deformation · 0.0string model · 0.0oxidation simulation · 0.0lithography simulation · 0.0ion implantation simulation · 0.0etching simulation · 0.0diffusion simulation · 0.0deposition simulation · 0.0boundary element method · 0.0
YearPublicationVenuePosition
1987 A New Two-Dimensional Silicon Oxidation Model
abstract
This paper describes a new two-dimensional silicon oxidation model taking into consideration the deformation of silicon. In the model based on the steady-state oxidant diffusion and viscoelastic deformation of the oxide, it is assumed that the oxide is composed of two layers during the deformation of the oxide. Simulated results on a LOCOS structure were obtained using the boundary element method (BEM). It is proved that the present model can analyze oxidation-induced stress in the silicon substrate, which is not explained by previous models, as well as predict the oxide shape.
Seiichi Isomae, Shuichi Yamamoto
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1987 A Two-Dimensional Integrated Process Simulator: SPIRIT-I
abstract
A new two-dimensional integrated process simulation system named SPIRIT-I (Simulation Processor for Integrated Representation of Impurity-profile and Topography-I) has been developed. This system includes elementary process simulators of deposition, lithography, etching, ion implantation, diffusion, and oxidation. SPIRIT features a closely coupled simulation between a topography simulator and impurity-profile simulators at each processing step. As an example of simulation, an LDD (Lightly-Doped Drain) MOSFET with tilted source and drain implantation has been derived. In addition, this process simulation system is closely connected with a 3D device simulator. Using this coupled simulation system, the critical effect of processing conditions on device characteristics is analyzed.
Masanori Ohgo, Yasuko Takano, Akemi Moniwa, Shuichi Yamamoto, Yoshio Sakai, Hiroo Masuda, Hideo Sunami
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4
1987 A Two-Dimensional Etching Profile Simulator: ESPRIT
abstract
A two-dimensional etching simulator named ESPRIT (FOOTNOTE: ESPRIT--Etching Simulation PRogram with an Improved sTring model.) has been developed to simulate LSI patterning. The etching simulator includes isotropic and anisotropic components. Its calculation method is based on the string model. ESPRIT can simulate etched profiles for multilayers with different etching rates and calculate side etching using sloped incidental anisotropic components. In addition, location correction, loop elimination, point insertion, and point elimination are provided for stable and accurate calculations. Simulated profiles coincide well with those from experiments in terms of relationship between the groove width and etched depth. ESPRIT can support to design LSI patterning process.
Shuichi Yamamoto, T. Kure, Masanori Ohgo, Teruo Matsuzawa, S. Tachi, Hideo Sunami
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1