Data-retention flip-flops (DR-FFs) efficiently maintain data during sleep mode, and retain state during transitions between active and sleep mode. This brief proposes an ultralow power DR-FF design with an improved autonomous data-retention (ADR) latch operating with a supply voltage range down to near/subthreshold, achieving a sleep mode leakage power of 12.2 pW,$1.4\times $–$3.8\times $less than the prior CMOS DR-FFs. Our proposed DR-FFs consume the lowest active mode switching efficiency of 36.5 fJ/step,$1.2\times $–$4\times $less than the prior works, and a comparable transition efficiency of 1.9 fJ/step. Furthermore, our proposed DR-FFs require minimal control signals, logic gates, and switches, significantly reducing design complexity, and avoiding the drawbacks of nonvolatile data retention FFs (NV-FFs).

To address the problem of spectrum resources and transmitting power for vehicular networks, this paper proposes a resource allocation (RA) method based on dueling double deep-Q network (D3QN) reinforcement learning (RL). Due to the high mobility of the vehicle, the channel changes rapidly which makes it difficult to accurately collect high-accuracy channel state information at the base station and to perform centralized management. In response of this difficulty, we construct a multi-intelligence model, using Manhattan Grid Layout City Model as the basis of environment and with each vehicle-to-vehicle (V2V) link as an intelligence. They work together to interact with the environment, receive appropriate observations, get rewards, and finally learn to improve the allocation of power and spectrum to enable users to achieve a better entertainment experience and a safer driving environment. Experimental results demonstrate that with proper training mechanism and reward function construction, cooperation among multiple intelligence can be performed in a distributed manner, with improvements in both the capacity of total vehicle-to-infrastructure links and the effective payload delivery success rate of the V2V links compared to common Q-network.

Circuits based on tunneling FET (TFET) devices are fueling the beyond CMOS logic design, meeting the ultra-low-power demands for Internet-of-Things (IoT) applications. This paper presents a highly energy-efficient hybrid TFET/FinFET level shifter (LS) circuit, providing a robust signal up-conversion from deep subthreshold voltage. A pulse-triggered dynamic fully-regenerative latch and two modified dynamic current generators are incorporated to overcome the timing variation of input differential signals and current contention in the cross-coupled circuit. The simulation results show that the hybrid TFET/FinFET LS circuit has achieved a low propagation delay, dynamic power consumption, and power-delay-product (PDP) of ≤378 ps, ≤39.6 μW, and ≤13,950 ns-nW, respectively while converting the input signal from the ultra-low-voltage of sub-50mV to the nominal supply voltage of FinFET (0.8-1.2V). The proposed architecture has achieved up to 2.71-to-15.99x improvement in PDP compared to the reported state-of-the-art LS architectures.

Level converting is increasingly difficult in ultra-low voltage circuits with the aggressive scaling down of the input voltage. In this paper, we proposed a wide output range level shifter (LS) with the ultra-low input voltage. The proposed LS is integrated with a positive flip-flop function with a three-phase time borrowing scheme at the sampling edge. The working principle eliminates the current contention problem in the conventional cross-coupled level shifters, which allows a much higher output range at ultra-low input. The time borrowing technique also allows a relaxed timing constraint, which increases the timing margin and improves robustness against variation in ultra-low voltage circuits. The proposed LS is implemented with 45nm CMOS technology. Simulation results show that the proposed structure achieves a propagation delay of 10.01ns, power consumption of 11.23pW, and a power-delay-product (PDP) of 112,412ns-nW when converting an input signal of 200mV to an output level of 3 V.

In this paper, we proposed a resource-efficient 'QRS' detector with superior detection accuracy. Inspired by the strategy of the folded architecture, we adopted a reconfigurable time-sharing computation unit with a pipeline schedule. To further precisely locate the position of the 'R' peak and minimize the extra hardware cost, we designed the position calibration unit (PCU) based on the data compression technique. The proposed architecture was implemented on Xilinx Zynq-7000 with Verilog programming language. The proposed architecture achieves a sensitivity, Se of 99.76%, a precision, +P of 99.85%, and a detection error rate, DER of 0.40% on MIT-BIH database, which attains the best performance compared to state-of-the-art designs. Furthermore, the proposed architecture achieves a better hardware efficiency with 13×, 1.28×, and 4.35× reductions in computing resources, storage memory, and power consumption, respectively.

Scenario identification plays a crucial role in enhancing the performance of vehicle-to-vehicle (V2V) communication systems. It enables smart vehicles to adjust driving speed in allowable range according to the surrounding circumstance automatically and avoid possible crashes. However, existing methods for scenario identification in vehicular networks have cumbersome processing of information sequence and huge energy consumption. This paper proposes a novel scenario identification method using joint multislice and cooperative detection aided residual network (Resnet), which can extract features from non-equalized signal at the receiver (Rx. signal) automatically and realize scenario recognition. Simulation results demonstrate that the proposed Resnet-based scenario identification method can achieve high classification accuracy with small model size.

Adaptive modulation and coding (AMC) technique plays an important role in vehicle-to-vehicle (V2V) systems. It enables smart vehicles to keep a good quality of communication for a better driving experience. However, the existing AMC methods for V2V system did not consider multiple scenarios and the amount of calculation is relatively large. In this paper, we propose a simple convolutional neural networks (CNN)-based AMC method which can extract features of channel and noise estimation from receiver, the transmitter will adjust in the light of modulation strategy to ensure the quality of V2V communication. Simulation results reveal that our proposed method performs better in terms of packet error rate (PER), throughput, classification accuracy with a lower prediction time.

Physical Unclonable Function (PUF) circuit extracts information from variations in a circuit or physical design to generate a unique key for electronics authentication, such as IoT devices and embedded systems. We proposed a high-speed pseudo linear feedback shift register with multiple ring oscillators PUF (PL-MRO-PUF), replacing the registers in LFSR with combinational logic to resemble a delay-sensitive ring oscillator (RO) circuit Furthermore, the use of multiple LFSR-based ROs with each different number of stages to form a 128-bit PUF allows us to increase the output's entropy and throughput. Hence, we have implemented the architecture in the Xilinx Artix-7 FPGA series boards. We have improved the operating frequency by 1.95×, and improve FoM by 1.5× compared to the PL-PUF [1]. We also have achieved higher randomness and uniqueness of 98.8% and 51.7%, respectively, compared to the conventional Arbiter PUF (A-PUF) [2].

Space–frequency modulation (SFM) signal is a potential waveform for multifunction radar with high degrees of freedom of space, time, and frequency. However, the introduction of the additional communication function will modulate the transmitting signal, which will severely deteriorate the autocorrelation function (ACF). Here, a modified CLEAN method is proposed to eliminate the influence of undesired sidelobes in ACF on the air target detection. In the proposed method, undesired sidelobes are treated as extra features of real target to obtain more precise estimation of its complex reflection coefficient. Moreover, by considering about the sparsity of air targets, the authors employ the sparse representation method to estimate the response of the current strongest target. Then the target occlusion is eliminated by iterative cancellation. Simulation results demonstrate that the proposed detector is reliable and effective for the SFM‐based integrated system.