Shubham Mishra

dblp:239/7225 · DBLP profile ↗
← Back
8ranked-venue papers
3as first author
8since 2021 · last 2026
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 2 first-author · 4 since 2021Artificial intelligence and machine learning · 3 · 3 since 2021Databases, data management, data science and information retrieval · 1 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
YearPublicationVenuePosition
2026 HarborMaster: Rollback Detection for Trusted Distributed Computing
Shubham Mishra, Alexander Thomas, Nurzhan Abdrassilov, Kaiyuan Chen 0001, Natacha Crooks, John Kubiatowicz
Proc. VLDB Endow.1
2024 LLMGuard: Guarding against Unsafe LLM Behavior
abstract
Although the rise of Large Language Models (LLMs) in enterprise settings brings new opportunities and capabilities, it also brings challenges, such as the risk of generating inappropriate, biased, or misleading content that violates regulations and can have legal concerns. To alleviate this, we present "LLMGuard", a tool that monitors user interactions with an LLM application and flags content against specific behaviours or conversation topics. To do this robustly, LLMGuard employs an ensemble of detectors.
Shubh Goyal, Medha Hira, Shubham Mishra, Sukriti Goyal, Arnav Goel, Niharika Dadu, Kirushikesh D. B., Sameep Mehta, Nishtha Madaan
AAAI3
2024 A Sub-1pJ/bit Laser Power Independent 32Gb/s Silicon Photonic EAM Driver in 65nm CMOS
abstract
Recent Germanium electro-absorption modulators (EAM) integrated into silicon photonic platforms promise energy-efficient electrooptic modulation. The Franz Keldysh absorption effect with a sub-ps response enables their high-speed modulation. Furthermore, the compact EAM footprint with a small capacitive load allows a lumped CMOS-based driver. However, the resulting large photocurrent due to absorption in EAM poses a challenge at moderate to high transmitter (TX) laser power, which hasn’t been adequately addressed in the prior art. This work demonstrates a novel push-pull 2.4VppNRZ CMOS driver at 32 Gb/s speed. The driver features a segmented design with a tunable class-AB style stage to source/sink the large photocurrent. The driver is designed in the 65nm LP CMOS technology operating with dual supply voltages of 2.4V and 1.2V, offering seamless operation from 0dBm to 17dBm TX laser power with energy efficiency of 0.7-0.8 pJ/bit for nominal TX laser power settings (0-8dBm) and achieving an extinction ratio (ER) of 4.14dB. The compact layout only occupies 9736µm2area.
Shubham Mishra, Vishal Saxena
ISCAS1
2023 Power Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits
abstract
Silicon photonics has emerged as a key enabler for progressing integrated circuits in the post-Moore scaling era, whereby the advantages of photonics complement the mature and robust CMOS circuit. The hybrid integration of CMOS electronics and photonics realizes entirely novel system-level functionality. Photonic integrated circuits (PICs) extensively employ thermo-optic tuning for calibrating for process and temperature variations, and also for reconfiguration of these circuits. These thermo-optic phase-shifters, or microheaters, are driven by electronic digital-to-analog converters (DACs) which induce an optical phase-shift proportional to the power delivered. Thus, linear power sweeping capability is desired from the DAC. In this work, we introduce power linear DACs, or PLDACs, which are expected to become a pervasive block in hybrid CMOS-photonic circuits. The mostly-digital PLDAC designed in the TSMC 65nm LP CMOS technology comprises of a 4-bit$\Delta \Sigma$modulator followed by a 4-bit current-steering DAC, a square root circuit, and the driver. The 12-bit PLDAC operates at an oversampled clock rate of 10MHz and delivers up to 24mW of power to doped-silicon microheaters in a SiP foundry process with an estimated silicon footprint of$305\mu \mathrm{m}\times 66\mu \mathrm{m}$.
Shubham Mishra, Vishal Saxena
ISCAS2
2022 Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use
abstract
Spiking Neural Networks shows promising results as the architecture of choice for realizing neuromorphic circuits based on emerging nonvolatile memory devices. High classification performance of Convolutional Neural Networks (CNNs) in processing of unstructured visual data render Spiking Convolutional Neural Networks (SCNNs) as the preferred architecture for energy-efficient visual data processing on neuromorphic system-on-a-chip. Mapping of CNN operation to CMOS/RRAM arrays has recently gained attention but the prior proposed architectures/circuits have been realized with incomplete functionality and peripheral circuit considerations. Max-Pooling is an essential operation in an SCNN layer, but it incurs significant area overhead when implemented directly in RRAM/CMOS. In this work, we propose a novel area-efficient SCNN circuit with temporal Max-Pooling and integrator sharing across the input features. Transistor-level simulations of the proposed SCNN realized on a crossbar array with peripheral circuits are presented using a hybrid 130nm CMOS technology with BEOL integrated HfOxRRAM devices.
Anuar Dorzhigulov, Shubham Mishra, Vishal Saxena
ISCAS2
2022 A Hybrid CMOS Photonic 25Gbps Microring Transmitter with a -0.5-1.2V Direct-Coupled Drive
abstract
Microring modulators integrated in silicon photonic technology platform have evolved to offer much higher energy-efficiency than the conventional Mach Zehnder modulators. This allows for lower drive voltages in the transmitter and compact layout footprint. However, the nonlinear response of the depletion-mode resonant device incurs unequal optical rise and fall times. In this work, we present a transmitter design for a microring based optical interconnects that provides a $1.7 V_{pp}$ swing while avoiding AC-coupling. The direct-coupled driver realized a universal NRZ transmitter with a small footprint. The transmitter is designed in a 65nm LP CMOS technology with 1.2V supply voltage and achieves 1.85 pJ/bit energy-efficiency at 25Gbps data rate, $\gt 8$ dB extinction ratio and 0.075mm2area.
Shubham Mishra, Md Jubayer Shawon, Anuar Dorzhigulov, Vishal Saxena
ISCAS1
2022 A Multimodal Corpus for Emotion Recognition in Sarcasm
abstract
While sentiment and emotion analysis have been studied extensively, the relationship between sarcasm and emotion has largely remained unexplored. A sarcastic expression may have a variety of underlying emotions. For example, “I love being ignored” belies sadness, while “my mobile is fabulous with a battery backup of only 15 minutes!” expresses frustration. Detecting the emotion behind a sarcastic expression is non-trivial yet an important task. We undertake the task of detecting the emotion in a sarcastic statement, which to the best of our knowledge, is hitherto unexplored. We start with the recently released multimodal sarcasm detection dataset (MUStARD) pre-annotated with 9 emotions. We identify and correct 343 incorrect emotion labels (out of 690). We double the size of the dataset, label it with emotions along with valence and arousal which are important indicators of emotional intensity. Finally, we label each sarcastic utterance with one of the four sarcasm types-Propositional, Embedded, Likeprefixed and Illocutionary, with the goal of advancing sarcasm detection research. Exhaustive experimentation with multimodal (text, audio, and video) fusion models establishes a benchmark for exact emotion recognition in sarcasm and outperforms the state-of-art sarcasm detection. We release the dataset enriched with various annotations and the code for research purposes: https://github.com/apoorva-nunna/MUStARD_Plus_Plus
Anupama Ray, Shubham Mishra, Apoorva Nunna, Pushpak Bhattacharyya
LREC2
2021 Sentiment Analysis of IMDb Movie Reviews: A Comparative Analysis of Feature Selection and Feature Extraction Techniques
Gahina Karak, Shubham Mishra, Arkadyuti Bandyopadhyay, Pavirala Ranga Sai Rohith, Hemant Rathore
HIS2