Haohui Mai

dblp:24/129 · DBLP profile ↗
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8ranked-venue papers
3as first author
3since 2021 · last 2025
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 4 · 2 first-author · 1 since 2021Artificial intelligence and machine learning · 2 · 2 since 2021Systems, architecture and hardware · 2 · 1 first-authorComputer networks · 1 · 1 first-authorSecurity and privacy · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
5 papers
Compilers and program optimization · 43% Program synthesis and code generation · 43% Operating systems · 7%
Network and information security
4 papers
Hardware security and side channels · 56% Blockchain and cryptocurrency security · 18% Authentication and access control · 18%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
GPUs and heterogeneous computing · 100%
Computer networks
1 paper
Network management and operations · 100%

Topics — the 15 heaviest of 20, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Program synthesis and code generation
code generation with language models
0.912025
Training Language Models to Generate Quality Code with Program Analysis Feedback · NeurIPS 2025
Compilers and program optimization
register allocation
0.912025
VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM · EMNLP 2025
Program synthesis and code generation › formal synthesis
verified code generation
0.912025
VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM · EMNLP 2025
Compilers and program optimization
verified compilation
0.912025
VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM · EMNLP 2025
Hardware security and side channels › trusted execution environments
GPU trusted execution
0.712023
Honeycomb: Secure and Efficient GPU Executions via Static Validation · OSDI 2023
Hardware security and side channels
trusted execution environments
0.712023
Honeycomb: Secure and Efficient GPU Executions via Static Validation · OSDI 2023
Blockchain and cryptocurrency security
fraud detection
0.412020
Boxer: Preventing fraud by scanning credit cards · USENIX Security Symposium 2020
Authentication and access control › device authentication
payment card authentication
0.412020
Boxer: Preventing fraud by scanning credit cards · USENIX Security Symposium 2020
GPUs and heterogeneous computing › GPU programming
GPU compiler optimization
0.312025
VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM · EMNLP 2025
Operating systems › mobile systems
mobile operating systems
0.212013
Verifying security invariants in ExpressOS · ASPLOS 2013
Network management and operations › network verification
data plane verification
0.112011
Debugging the data plane with anteater · SIGCOMM 2011
Network management and operations › fault management
fault diagnosis
0.112011
Debugging the data plane with anteater · SIGCOMM 2011
Systems and software security
operating system security
0.112010
Trust and Protection in the Illinois Browser Operating System · OSDI 2010
Debugging and program repair
root cause analysis
0.112010
SherLog: error diagnosis by connecting clues from run-time logs · ASPLOS 2010
Web and mobile security
mobile security
0.012013
Verifying security invariants in ExpressOS · ASPLOS 2013

Methods — techniques the papers use, named apart from their topics

static analysis · 2.7verifier-guided regeneration · 1.7large language model fine-tuning · 1.7unit testing · 0.9reinforcement learning · 0.9credit card scanning · 0.4security invariant proving · 0.3formal methods · 0.3log analysis · 0.1causality inference · 0.1
YearPublicationVenuePosition
2025 VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM
abstract
Modern GPUs evolve rapidly, yet production compilers still rely on hand-crafted register allocation heuristics that require substantial retuning for each hardware generation.We introduce VERILOCC, a framework that combines large language models (LLMs) with formal compiler techniques to enable generalizable and verifiable register allocation across GPU architectures.VERILOCC fine-tunes an LLM to translate intermediate representations (MIRs) into target-specific register assignments, aided by static analysis for cross-architecture normalization and generalization and a verifierguided regeneration loop to ensure correctness.Evaluated on matrix multiplication (GEMM) and multi-head attention (MHA), VERILOCC achieves 85-99% single-shot accuracy and near-100% [email protected] study shows that VERILOCC discovers more performant assignments than expert-tuned libraries, outperforming rocBLAS by over 10% in runtime.
Lesheng Jin, Zhenyuan Ruan, Haohui Mai, Jingbo Shang
EMNLP3
2025 Training Language Models to Generate Quality Code with Program Analysis Feedback
abstract
Code generation with large language models (LLMs), often termed vibe coding, is increasingly adopted in production but fails to ensure code quality, particularly in security (e.g., SQL injection vulnerabilities) and maintainability (e.g., missing type annotations). Existing methods, such as supervised fine-tuning and rule-based post-processing, rely on labor-intensive annotations or brittle heuristics, limiting their scalability and effectiveness. We propose REAL (Reinforcement rEwards from Automated anaLysis), a reinforcement learning framework that trains LLMs to generate production-quality code using program analysis–guided feedback. Specifically, REAL integrates two automated signals: (1) static analyzers detecting security and maintainability defects and (2) unit tests ensuring functional correctness. Unlike prior work, our framework is prompt-agnostic and reference-free, enabling scalable supervision without manual intervention. Experiments across multiple datasets and model scales demonstrate that REAL outperforms state-of-the-art methods in simultaneous assessments of functionality and code quality. Our work bridges the gap between rapid prototyping and production-ready code, enabling LLMs to deliver both speed and quality.
Zilong Wang 0002, Junxia Cui, Xiaohan Fu, Haohui Mai, Viswanathan Krishnan, Jianfeng Gao 0001, Jingbo Shang
NeurIPS7
2023 Honeycomb: Secure and Efficient GPU Executions via Static Validation
Haohui Mai, Hongren Zheng, Zibin Liu, Mingyu Gao 0001, Huimin Cui, Xiaobing Feng 0002, Christoforos E. Kozyrakis
OSDI1
2020 Boxer: Preventing fraud by scanning credit cards
Zain ul Abi Din, Hari Venugopalan, Jaime Park, Andy Li, Weisu Yin, Haohui Mai, Yong Jae Lee, Steven Liu, Samuel T. King
USENIX Security Symposium6
2013 Verifying security invariants in ExpressOS
abstract
Security for applications running on mobile devices is important. In this paper we present ExpressOS, a new OS for enabling high-assurance applications to run on commodity mobile devices securely. Our main contributions are a new OS architecture and our use of formal methods for proving key security invariants about our implementation. In our use of formal methods, we focus solely on proving that our OS implements our security invariants correctly, rather than striving for full functional correctness, requiring significantly less verification effort while still proving the security relevant aspects of our system.
Haohui Mai, Edgar Pek, Hui Xue 0007, Samuel T. King, P. Madhusudan
ASPLOS1
2011 Debugging the data plane with anteater
abstract
Diagnosing problems in networks is a time-consuming and error-prone process. Existing tools to assist operators primarily focus on analyzing control plane configuration. Configuration analysis is limited in that it cannot find bugs in router software, and is harder to generalize across protocols since it must model complex configuration languages and dynamic protocol behavior.
Haohui Mai, Ahmed Khurshid, Rachit Agarwal 0001, Matthew Caesar 0001, Brighten Godfrey, Samuel T. King
SIGCOMM1
2010 SherLog: error diagnosis by connecting clues from run-time logs
abstract
Computer systems often fail due to many factors such as software bugs or administrator errors. Diagnosing such production run failures is an important but challenging task since it is difficult to reproduce them in house due to various reasons: (1) unavailability of users' inputs and file content due to privacy concerns; (2) difficulty in building the exact same execution environment; and (3) non-determinism of concurrent executions on multi-processors.
Ding Yuan 0004, Haohui Mai, Weiwei Xiong, Lin Tan 0001, Yuanyuan Zhou 0001, Shankar Pasupathy
ASPLOS2
2010 Trust and Protection in the Illinois Browser Operating System
Haohui Mai, Samuel T. King
OSDI2