Demo Data from EDBT 2026 / reviewers in the wild / expert
Stefan Mohl
dblp:24/1613
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 2006
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Reconfigurable computing and FPGAs · 70% Electronic design automation · 30% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › high-level synthesis › behavioral transformation
behavioral synthesis |
0.1 | 1 | 2006 | Innovative technologies I - Using FPGAs in supercomputers: breaking with reconfigurable computing · SC 2006 |
Reconfigurable computing and FPGAs › high-performance reconfigurable computing
FPGA in supercomputing |
0.1 | 1 | 2006 | Innovative technologies I - Using FPGAs in supercomputers: breaking with reconfigurable computing · SC 2006 |
Reconfigurable computing and FPGAs › reconfigurable architecture
reconfigurable processor |
0.1 | 1 | 2006 | Innovative technologies I - Using FPGAs in supercomputers: breaking with reconfigurable computing · SC 2006 |
Reconfigurable computing and FPGAs › high-performance reconfigurable computing
reconfigurable supercomputing |
0.0 | 1 | 2006 | Innovative technologies I - Using FPGAs in supercomputers: breaking with reconfigurable computing · SC 2006 |
Methods — techniques the papers use, named apart from their topics
soft-core processor · 0.1library development · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2006 | Innovative technologies I - Using FPGAs in supercomputers: breaking with reconfigurable computingabstractFPGAs have recently emerged as a computational device for general purpose computing with extremely high performance. An FPGA is essentially an empty silicon surface that can be loaded with any circuit design. However, to create a circuit design for an algorithm requires the skills of a hardware designer. Therefore FPGAs are reputed to be hard to use.The advent of supercomputers from Cray and SGI equipped with FPGAs has given rise to the emerging field of Reconfigurable Supercomputing. Here, the focus is methods for algorithm development in FPGAs, rather than machine architecture. Within this field, three new directions have evolved: Library development, Behavioral Synthesis and Reconfigurable Processor Architectures.The Mitrion Virtual Processor is a massively parallel, reconfigurable soft-core processor for FPGAs. It is 10-30 times faster than traditional processors. With a Mitrion processor in the FPGA, it becomes possible to program the processor, rather than manually design circuits. Stefan Mohl |
SC | 1 |