Smartphones nowadays handle large amounts of sensitive user information, since users exchange undisclosed information on an everyday basis. This generates the need for more effective authentication mechanisms, deviating from the traditional ones. In this direction, many research approaches are targeted towards continuous implicit authentication, on the basis of modelling the constant interaction of the user with the device. These approaches yield promising results, however certain improvements can be made by exploiting the sequential order of the predictions and the known performance metrics. In this work, we propose a heuristics algorithm, which, given a series of predictions from any continuous implicit authentication model, can ex-ploit the sequential order in order to fix any false predictions and improve the accuracy of the smartphone security system. Preliminary evaluation on several axes indicates that our approach can effectively improve any CIA model and achieve significantly better results.

The full integration of online repositories in contemporary software development promotes remote work and collaboration. Apart from the apparent benefits, online repositories offer a deluge of data that can be utilized to monitor and improve the software development process. Towards this direction, we have designed and implemented a platform that analyzes data from GitHub in order to compute a series of metrics that quantify the contributions of project collaborators, both from a development as well as an operations (communication) perspective. We analyze contributions throughout the projects' lifecycle and track the number of coding violations, this way aspiring to identify cases of software development that need closer monitoring and (possibly) further actions to be taken. In this context, we have analyzed the 3000 most popular GitHub Java projects and provide the data to the community.

Nowadays, the continuously increasing use of smart-phones as the primary way of dealing with day-to-day tasks raises several concerns mainly focusing on privacy and security. In this context and given the known limitations and deficiencies of traditional authentication mechanisms, a lot of research efforts are targeted towards continuous implicit authentication on the basis of behavioral biometrics. In this work, we propose a methodology towards continuous implicit authentication that refrains from the limitations imposed by small-scale and/or controlled environment experiments by employing a real-world application used widely by a large number of individuals. Upon constructing our models using Support Vector Machines, we introduce a confidence-based methodology, in order to strengthen the effectiveness and the efficiency of our approach. The evaluation of our methodology on a set of diverse scenarios indicates that our approach achieves good results both in terms of efficiency and usability.

Most software teams nowadays host their projects online and monitor software development in the form of issues/tasks. This process entails communicating through comments and reporting progress through commits and closing issues. In this context, assigning new issues, tasks or bugs to the most suitable contributor largely improves efficiency. Thus, several automated issue assignment approaches have been proposed, which however have major limitations. Most systems focus only on assigning bugs using textual data, are limited to projects explicitly using bug tracking systems, and may require manually tuning parameters per project. In this work, we build an automated issue assignment system for GitHub, taking into account the commits and issues of the repository under analysis. Our system aggregates feature probabilities using a neural network that adapts to each project, thus not requiring manual parameter tuning. Upon evaluating our methodology, we conclude that it can be efficient for automated issue assignment.

In the era of Big Data, Cloud Computing and Internet of Things, most of the existing, integrated solutions that attempt to solve their challenges are either proprietary, limit functionality to a predefined set of requirements, or hide the way data are stored and accessed. In this work we propose Cenote, an open source Big Data management and analytics infrastructure for the Web of Things that overcomes the above limitations. Cenote is built on component-based software engineering principles and provides an all-inclusive solution based on components that work well individually.

As the popularity of the JavaScript language is constantly increasing, one of the most important challenges today is to assess the quality of JavaScript packages. Developers often employ tools for code linting and for the extraction of static analysis metrics in order to assess and/or improve their code. In this context, we have developed npn-miner, a platform that crawls the npm registry and analyzes the packages using static analysis tools in order to extract detailed quality metrics as well as high-level quality attributes, such as maintainability and security. Our infrastructure includes an index that is accessible through a web interface, while we have also constructed a dataset with the results of a detailed analysis for 2000 popular npm packages.

The popularity of open source software repositories and the highly adopted paradigm of software reuse have led to the development of several tools that aspire to assess the quality of source code. However, most software quality estimation tools, even the ones using adaptable models, depend on fixed metric thresholds for defining the ground truth. In this work we argue that the popularity of software components, as perceived by developers, can be considered as an indicator of software quality. We present a generic methodology that relates quality with source code metrics and estimates the quality of software components residing in popular GitHub repositories. Our methodology employs two models: a one-class classifier, used to rule out low quality code, and a neural network, that computes a quality score for each software component. Preliminary evaluation indicates that our approach can be effective for identifying high quality software components in the context of reuse.

The paper presents a new approach to the Volterra analysis of analog circuits. This kind of analysis is widely used for the calculation of distortion and intermodulation products. However, the analysis is limited to circuits with small signal excitations and becomes inaccurate when the input signal amplitude increases, especially when MOSFETs are involved. In this paper, the authors analyze the reasons of this drawback, which is no other than the Taylor series' convergence properties. Furthermore, the authors propose a solution, by calculating the nonlinearity coefficients using a different type of polynomial expansion, the Chebyshev series. The authors also present results comparing Chebyshev series performance with other types of polynomial expansions. Finally, the authors apply the proposed method to analyze the intermodulation distortion (IMD) of a CMOS RF power amplifier.

A phase frequency detector (PFD) with wide linear operating range and the ability to saturate beyond that range is presented in this paper. Its use in phase locked loops (PLLs) implies elimination of cycle slipping, which results in an analytically predictable transient behavior and a possible improvement in acquisition speed, depending on the PLL design. Simulation results confirm these advantages. Moreover, a detailed study on the applicability of this PFD is conducted in this paper

Introduces a very effective priority mechanism for high speed DQDB type metropolitan area networks (MANs). The proposed mechanism can be applied to either of the two variations of the no slot wasting bandwidth balancing mechanism and enables high priority traffic to have almost immediate access to the transmission medium; regardless of the presence of low priority traffic. The authors use simulation results to investigate the delay performance of the proposed priority mechanism in the case of three classes of traffic. Furthermore, they compare its performance with the corresponding performance of other (previously proposed) priority mechanisms. Finally, they examine its ability to support real-time traffic such as voice and video.>

The no slot wasting immediately using the TAR bit (NSW IUT) bandwidth balancing mechanism has been previously proposed for dual bus architectures. NSW IUT is a variation of the no slot wasting bandwidth balancing (NSW BWB) mechanism and it can also introduce bandwidth fairness into a DQDB network without wasting channel slots. In addition, it enables lightly loaded stations to use more effectively the TAR=1 bits they observe and improve considerably their delay performance. In the paper, the authors use simulation to carry out a thorough investigation of the delay performance of the NSW IUT mechanism under single and multiple priority classes of traffic as well as under the presence of erasure nodes. Throughout the study, they also compare NSW IUT with NSW BWB as well as with the bandwidth balancing of the IEEE 802.6 standard.>

The no-slot-wasting bandwidth balancing (NSW BWB) recently proposed for dual-bus architectures provides throughput fairness and arbitrary bandwidth distribution without wasting channel slots. The performance of two variations of NSW BWB in the presence of erasure nodes and under one or multiple priority classes of traffic is studied by simulation. For both variations, the effect of the erasure mode locations on the throughputs of the various stations, as well as priority classes of traffic, is examined, and the performance of NSW BWB is compared with the corresponding performance of the bandwidth-balancing mechanism of the distributed queue dual bus. The simulation results reveal some very interesting properties for the first of the two NSW BWB variations that are used to derive analytic estimates of its throughput performance in the general case of arbitrary number of stations and arbitrary location of erasure nodes.>

A bandwidth balancing (BWB) mechanism has been added to the distributed queueing algorithm of the distributed-queue dual bus (DQDB) network. BWB can provide the requested throughputs by lightly loaded stations and evenly distribute the remaining channel bandwidth among overloaded stations. However, its operation requires the wastage of channel slots. The authors introduce a new bandwidth balancing mechanism for DQDB. The operation of the new mechanism requires one additional bit in the access control field (ACF) of the slot but has the advantage of exhibiting a similar behavior with the current BWB mechanism of DQDB without wasting any channel slots. For this reason, it can converge faster to the steady state in which fair bandwidth allocation is achieved. The authors investigate the throughput and delay performance of the proposed mechanism under one traffic class and examine its capacity to support multiple priority classes of traffic. They also compare its performance with the corresponding performance of the BWB mechanism of DQDB.>

A thorough investigation of the performance of the rotating slot generator (RSG) scheme, based on simulation, is presented. RSG is a medium access control protocol appropriate for high-capacity long-distance metropolitan area networks (MANs). It uses the looped bus architecture of the distributed queue dual bus (DQDB) in which the slot generators for both busses are colocated inside the same station. However in RSG, all the stations, one after the other in a cyclic order, undertake the task of generating and destroying the slots on both busses. In this way the location of the station relative to the slot generator changes dynamically, and its effect on the performance is drastically reduced. The authors investigate the fairness and performance of RSG under symmetric and asymmetric loading, underload and overload conditions, and under the presence of a single or multiple priority classes of traffic. They also compare its performance with different variations of DQDB.>