EDBT 2026 Demo / reviewers in the wild / expert
Ki Tae Park
dblp:24/5052
· DBLP profile ↗
4ranked-venue papers
2as first author
0since 2021 · last 2007
0000-0002-4632-4882ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1Systems, architecture and hardware · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 61% Emerging computing paradigms · 30% GPUs and heterogeneous computing · 9% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
3d integration |
0.0 | 1 | 2000 | Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000 |
Integrated circuit design › 3d integration
3D LSI |
0.0 | 1 | 2000 | Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000 |
Emerging computing paradigms
neuromorphic computing |
0.0 | 1 | 2000 | Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000 |
GPUs and heterogeneous computing
vision processing |
0.0 | 1 | 2000 | Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000 |
Methods — techniques the papers use, named apart from their topics
three-dimensional LSI technology · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2007 | Automatic Extraction of Salient Objects using Feature MapsabstractIn this paper, we propose a technique for extracting salient objects in images using feature maps, regardless of the complexity of images and the position of objects. In order to extract salient objects, the proposed method uses feature maps with edge and color information. We also propose a reference map created by integrating feature maps, and a combination map representing the boundaries of meaningful objects that is created by integrating the reference map and feature maps. Candidate object regions including boundaries of objects from the combination map are extracted by convex hull algorithm. Finally, by applying a segmentation algorithm on the area of candidate regions, object regions and background regions are separated, and real object regions are extracted from the candidate object regions. Experimental results show that the proposed method extracts the salient objects efficiently, with 84.3% precision rate and 81.3% recall rate. Ki Tae Park, Young Shik Moon |
ICASSP (1) | 1 |
| 2006 | Object-Based Image Retrieval Using Dominant Color Pairs Between Adjacent Regions
Ki Tae Park, Young Shik Moon |
ICCSA (5) | 1 |
| 2000 | Smart Vision Chip Fabricated Using Three Dimensional Integration TechnologyabstractThe smart VISIOn chip has a large potential for application in general purpose high speed image processing systems. In order to fabricate smart vision chips including photo detector compactly, we have proposed the application of three dimensional LSI technology for smart vision chips. Three dimensional technology has great potential to realize new neuromorphic systems inspired by not only the biological function but also the biological structure. In this paper, we describe our three dimensional LSI technology for neuromorphic circuits and the design of smart vision chips . Hiroyuki Kurino, Masaki Nakagawa, Kang Wook Lee 0002, Tomonori Nakamura, Yuusuke Yamada, Ki Tae Park, Mitsumasa Koyanagi |
NIPS | 6 |
| 1994 | Automatic Failure-Analysis System for High-Density DRAMabstractIn this paper, the automatic failure analysis method based on the random bit failure causing the major yield drop in DRAM and the analysis system named "SEC FAILURE ANALYSIS SYSTEM" are discussed. This system is developed for the accurate and rapid electrical analysis of the failure in a statistical manner in order to make a quick feedback to the manufacturing process. Sangchul Oh, Jae-Ho Kim, Ho-Jeong Choi, Si-Don Choi, Ki Tae Park, Wha-Joon Lee |
ITC | 5 |