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Merrill E. Isenman

dblp:24/5102 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1990
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Theoretical computer science
1 paper
Algorithms and data structures · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures › pattern matching accelerator
string matching accelerator
0.011990
Performance and Architectural Issues for String Matching · IEEE Trans. Computers 1990
Algorithms and data structures › sequence algorithms › string algorithms › string matching
knuth-morris-pratt algorithm
0.011990
Performance and Architectural Issues for String Matching · IEEE Trans. Computers 1990
Algorithms and data structures › sequence algorithms › string algorithms
string matching
0.011990
Performance and Architectural Issues for String Matching · IEEE Trans. Computers 1990

Methods — techniques the papers use, named apart from their topics

heuristic optimization · 0.0finite-state machine · 0.0finite state machine · 0.0
YearPublicationVenuePosition
1990 Performance and Architectural Issues for String Matching
abstract
The authors introduce special heuristics to the Knuth-Morris-Pratt algorithm to reduce the time and space required to perform the string matching. They compare their hardware-based approach to the software approaches embodied in the Unix system grep and fgrep commands. Simulation results show that the hardware approach can provide a 25-500-fold performance improvement, depending on the complexity of the query, and that it is fast enough, even in the presence of variable-length 'don't cares' to keep up with a 20-million character/second disk. The approach compares favorably to other hardware designs in speed and space. The proposed hardware implementation requires 10 kB of one cycle static memory, 28 single-character comparators, four 16-b adders, and control logic for four finite-state machines with a term-matcher controller. After that, additional hardware produces negligible performance improvements for queries with up to 80 terms, about half of which have variable-length 'don't cares'.>
Merrill E. Isenman, Dennis E. Shasha
IEEE Trans. Computers1