A new multistage interconnection network is presented in this paper. It is able to handle the communications between the connected devices correctly, even in the presence of fault(s) in the network. This goal is achieved by using redundant paths with a fast procedure able to dynamically reroute the message. It is also shown that the rerouting properties are still valid when broadcasting transmission is used.

Three new arrays for unsigned and signed multiplication, and for multiplication/addition are presented. It is assumed that the factors are axpressed in 2's complement, while the addend (in the latter array only) and the result are expressed in a redundant notation. The arrays operate in serial-parallel way, since one factor is input in parallel, while the second factor and the addend (in the case of multiplication/addition) are entered digit by digit starting from the most significant one; the result is also produced serially with the most significant digit first. Hence, the arithmetic unit presented is suitable to be used as basic block of special purpose processors performing functions such as non-recursive digital filtering, signal correlation and matrix multiplication. Indeed, they have the same speed improvements as other similar units using redundant representations for the result, with a cost equivalent to their counterparts based on full 2's complement representation.

A high speed multiplying array is presented. It is based on a new cell, which is able to generate and add a rectangular block of elementary products. A careful design of the cell allows us to obtain a small delay for the signals which should be propagated through the whole array. This feature leads to a remarkable improvement in the array speed.

In this paper a low-cost, small dimensions, multiple users audio response system using microprocessors and LSI circuits is presented, The synthesis strategy is performed by a MOS microprocessor, which provides 12 LPC parameters to a microprogrammable digital filter. The synthetic message is produced by a concatenation of units which range from words to dyad-like elements, depending on the application. The synthesis algorithm is based on two main steps: the segment concatenation rules and the prosodic rules. The fundamental frequency contour is defined by the type of sentence, the punctuation ma rks and the position of the accents.

The characterization of the influence of lexicon and syntax on the pitch contour in the Italian language is presented. The results of the work will be used in a Speech Understanding System for defining some constraints in the emission of hypotheses and for evaluating the likelihood that a synctatic structure can generate a given pattern of fundamental frequency. The pitch evolution is only determined in voiced tracts; then it is subdivided in a sequence of primitives and translated in symbols. Such strings of symbols are considered as sentences of a set regular languages, whose productions are learned using a stochastic inference procedure. Some results obtained from controlled experiments in which various factors are varied separately are presented.

This paper presents a new method to study arithmetic combinatorial circuits. Using polynomial associated to the input-output sequences and to the systems it is possible to solve the problem of minimization of the number of the component blocks. Particularly, the important case of the multiple outputs elementary units can be treated. Applications of the introduced procedures to multiplier and to fast networks for performing convolution are presented.

This paper describes a special-purpose processor for use in performing various operations on sampled signals. The system is fast, flexible, and programmable for performing, in real time, operations such as fast Fourier transformation (FFT) and digital filtering of acoustically derived signals.

An algorithm for performing signed-number multiplications using positive-number full multipliers is presented. It leads to very simple input-and output-correcting networks which are cellular iterative and introduce negligible additional delay.