Demo Data from EDBT 2026 / reviewers in the wild / expert
James L. Mangin
dblp:24/6609
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1986
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
multivalued logic circuit |
0.0 | 1 | 1986 | Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits · IEEE Trans. Computers 1986 |
Integrated circuit design › digital circuit design › multivalued logic circuit
quaternary logic |
0.0 | 1 | 1986 | Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits · IEEE Trans. Computers 1986 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1986 | Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits · IEEE Trans. Computers 1986 |
Integrated circuit design › VLSI design
VLSI encoder and decoder circuits |
0.0 | 1 | 1986 | Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits · IEEE Trans. Computers 1986 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1986 | Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder CircuitsabstractThe use of quaternary logic input and output signals for delivering information on and off chip could reduce the number of required package pins or increase the amount of information conveyed on a fixed number of package pins. In this correspondence, we discuss the performance of prototype CMOS binary-to-quaternary encoder and quaternary-to-binary decoder test circuits that have been realized on a gate array IC chip. James L. Mangin, K. Wayne Current |
IEEE Trans. Computers | 1 |